; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM

define i8 @cmov8(i8 %a, i8 %b, i8 %x, ptr %y.ptr) {
; CHECK-LABEL: cmov8:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    cmpb %sil, %dil # encoding: [0x40,0x38,0xf7]
; CHECK-NEXT:    cmovbel %edx, %edi # EVEX TO LEGACY Compression encoding: [0x0f,0x46,0xfa]
; CHECK-NEXT:    movzbl (%rcx), %eax # encoding: [0x0f,0xb6,0x01]
; CHECK-NEXT:    cmovbel %edx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x46,0xc2]
; CHECK-NEXT:    addb %dil, %al # EVEX TO LEGACY Compression encoding: [0x40,0x00,0xf8]
; CHECK-NEXT:    retq # encoding: [0xc3]
entry:
  %cond = icmp ugt i8 %a, %b
  %y = load i8, ptr %y.ptr
  %z2 = select i1 %cond, i8 %a, i8 %x
  %z1 = select i1 %cond, i8 %y, i8 %x
  %s1 = add i8 %z1, %z2
  ret i8 %s1
}

define i16 @cmov16(i16 %a, i16 %b, i16 %x, ptr %y.ptr) {
; NDD-LABEL: cmov16:
; NDD:       # %bb.0: # %entry
; NDD-NEXT:    cmpw %si, %di # encoding: [0x66,0x39,0xf7]
; NDD-NEXT:    cmovbel %edx, %edi # EVEX TO LEGACY Compression encoding: [0x0f,0x46,0xfa]
; NDD-NEXT:    movzwl (%rcx), %eax # encoding: [0x0f,0xb7,0x01]
; NDD-NEXT:    cmovbew %dx, %ax # encoding: [0x66,0x0f,0x46,0xc2]
; NDD-NEXT:    addw %di, %ax # EVEX TO LEGACY Compression encoding: [0x66,0x01,0xf8]
; NDD-NEXT:    retq # encoding: [0xc3]
;
; MEM-LABEL: cmov16:
; MEM:       # %bb.0: # %entry
; MEM-NEXT:    cmpw %si, %di # encoding: [0x66,0x39,0xf7]
; MEM-NEXT:    cmovbel %edx, %edi # EVEX TO LEGACY Compression encoding: [0x0f,0x46,0xfa]
; MEM-NEXT:    cmovaw (%rcx), %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x47,0x11]
; MEM-NEXT:    addw %di, %ax # EVEX TO LEGACY Compression encoding: [0x66,0x01,0xf8]
; MEM-NEXT:    retq # encoding: [0xc3]
entry:
  %cond = icmp ugt i16 %a, %b
  %y = load i16, ptr %y.ptr
  %z2 = select i1 %cond, i16 %a, i16 %x
  %z1 = select i1 %cond, i16 %y, i16 %x
  %s1 = add i16 %z1, %z2
  ret i16 %s1
}

define i32 @cmov32(i32 %a, i32 %b, i32 %x, ptr %y.ptr) {
; NDD-LABEL: cmov32:
; NDD:       # %bb.0: # %entry
; NDD-NEXT:    cmpl %esi, %edi # encoding: [0x39,0xf7]
; NDD-NEXT:    cmoval %edi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x47,0xd7]
; NDD-NEXT:    cmoval (%rcx), %edx # encoding: [0x0f,0x47,0x11]
; NDD-NEXT:    addl %edx, %eax # EVEX TO LEGACY Compression encoding: [0x01,0xd0]
; NDD-NEXT:    retq # encoding: [0xc3]
;
; MEM-LABEL: cmov32:
; MEM:       # %bb.0: # %entry
; MEM-NEXT:    cmpl %esi, %edi # encoding: [0x39,0xf7]
; MEM-NEXT:    movl %edx, %eax # encoding: [0x89,0xd0]
; MEM-NEXT:    jbe .LBB2_2 # encoding: [0x76,A]
; MEM-NEXT:    # fixup A - offset: 1, value: .LBB2_2, kind: FK_PCRel_1
; MEM-NEXT:  # %bb.1: # %entry
; MEM-NEXT:    movl (%rcx), %eax # encoding: [0x8b,0x01]
; MEM-NEXT:    movl %edi, %edx # encoding: [0x89,0xfa]
; MEM-NEXT:  .LBB2_2: # %entry
; MEM-NEXT:    addl %edx, %eax # EVEX TO LEGACY Compression encoding: [0x01,0xd0]
; MEM-NEXT:    retq # encoding: [0xc3]
entry:
  %cond = icmp ugt i32 %a, %b
  %y = load i32, ptr %y.ptr
  %z2 = select i1 %cond, i32 %a, i32 %x
  %z1 = select i1 %cond, i32 %y, i32 %x
  %s1 = add i32 %z1, %z2
  ret i32 %s1
}

define i64 @cmov64(i64 %a, i64 %b, i64 %x, ptr %y.ptr) {
; NDD-LABEL: cmov64:
; NDD:       # %bb.0: # %entry
; NDD-NEXT:    cmpq %rsi, %rdi # encoding: [0x48,0x39,0xf7]
; NDD-NEXT:    cmovaq %rdi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x47,0xd7]
; NDD-NEXT:    cmovaq (%rcx), %rdx # encoding: [0x48,0x0f,0x47,0x11]
; NDD-NEXT:    addq %rdx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x01,0xd0]
; NDD-NEXT:    retq # encoding: [0xc3]
;
; MEM-LABEL: cmov64:
; MEM:       # %bb.0: # %entry
; MEM-NEXT:    cmpq %rsi, %rdi # encoding: [0x48,0x39,0xf7]
; MEM-NEXT:    movq %rdx, %rax # encoding: [0x48,0x89,0xd0]
; MEM-NEXT:    jbe .LBB3_2 # encoding: [0x76,A]
; MEM-NEXT:    # fixup A - offset: 1, value: .LBB3_2, kind: FK_PCRel_1
; MEM-NEXT:  # %bb.1: # %entry
; MEM-NEXT:    movq (%rcx), %rax # encoding: [0x48,0x8b,0x01]
; MEM-NEXT:    movq %rdi, %rdx # encoding: [0x48,0x89,0xfa]
; MEM-NEXT:  .LBB3_2: # %entry
; MEM-NEXT:    addq %rdx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x01,0xd0]
; MEM-NEXT:    retq # encoding: [0xc3]
entry:
  %cond = icmp ugt i64 %a, %b
  %y = load i64, ptr %y.ptr
  %z2 = select i1 %cond, i64 %a, i64 %x
  %z1 = select i1 %cond, i64 %y, i64 %x
  %s1 = add i64 %z1, %z2
  ret i64 %s1
}

define i8 @cmov8rm_inv(i8 %a, i8 %x, ptr %y.ptr) {
; CHECK-LABEL: cmov8rm_inv:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    testb %dil, %dil # encoding: [0x40,0x84,0xff]
; CHECK-NEXT:    movzbl (%rdx), %eax # encoding: [0x0f,0xb6,0x02]
; CHECK-NEXT:    cmovsl %esi, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x48,0xc6]
; CHECK-NEXT:    # kill: def $al killed $al killed $eax
; CHECK-NEXT:    retq # encoding: [0xc3]
entry:
  %y = load i8, ptr %y.ptr
  %cmp = icmp slt i8 %a, 0
  %cmov = select i1 %cmp, i8 %x, i8 %y
  ret i8 %cmov
}

define i16 @cmov16rm_inv(i16 %a, i16 %x, ptr %y.ptr) {
; NDD-LABEL: cmov16rm_inv:
; NDD:       # %bb.0: # %entry
; NDD-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
; NDD-NEXT:    testw %di, %di # encoding: [0x66,0x85,0xff]
; NDD-NEXT:    cmovnsw (%rdx), %ax # encoding: [0x66,0x0f,0x49,0x02]
; NDD-NEXT:    # kill: def $ax killed $ax killed $eax
; NDD-NEXT:    retq # encoding: [0xc3]
;
; MEM-LABEL: cmov16rm_inv:
; MEM:       # %bb.0: # %entry
; MEM-NEXT:    testw %di, %di # encoding: [0x66,0x85,0xff]
; MEM-NEXT:    js .LBB5_1 # encoding: [0x78,A]
; MEM-NEXT:    # fixup A - offset: 1, value: .LBB5_1, kind: FK_PCRel_1
; MEM-NEXT:  # %bb.2: # %entry
; MEM-NEXT:    movzwl (%rdx), %eax # encoding: [0x0f,0xb7,0x02]
; MEM-NEXT:    # kill: def $ax killed $ax killed $eax
; MEM-NEXT:    retq # encoding: [0xc3]
; MEM-NEXT:  .LBB5_1:
; MEM-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
; MEM-NEXT:    # kill: def $ax killed $ax killed $eax
; MEM-NEXT:    retq # encoding: [0xc3]
entry:
  %y = load i16, ptr %y.ptr
  %cmp = icmp slt i16 %a, 0
  %cmov = select i1 %cmp, i16 %x, i16 %y
  ret i16 %cmov
}

define i32 @cmov32rm_inv(i32 %a, i32 %x, ptr %y.ptr) {
; NDD-LABEL: cmov32rm_inv:
; NDD:       # %bb.0: # %entry
; NDD-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
; NDD-NEXT:    testl %edi, %edi # encoding: [0x85,0xff]
; NDD-NEXT:    cmovnsl (%rdx), %eax # encoding: [0x0f,0x49,0x02]
; NDD-NEXT:    retq # encoding: [0xc3]
;
; MEM-LABEL: cmov32rm_inv:
; MEM:       # %bb.0: # %entry
; MEM-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
; MEM-NEXT:    testl %edi, %edi # encoding: [0x85,0xff]
; MEM-NEXT:    js .LBB6_2 # encoding: [0x78,A]
; MEM-NEXT:    # fixup A - offset: 1, value: .LBB6_2, kind: FK_PCRel_1
; MEM-NEXT:  # %bb.1: # %entry
; MEM-NEXT:    movl (%rdx), %eax # encoding: [0x8b,0x02]
; MEM-NEXT:  .LBB6_2: # %entry
; MEM-NEXT:    retq # encoding: [0xc3]
entry:
  %y = load i32, ptr %y.ptr
  %cmp = icmp slt i32 %a, 0
  %cmov = select i1 %cmp, i32 %x, i32 %y
  ret i32 %cmov
}

define i64 @cmov64rm_inv(i64 %a, i64 %x, ptr %y.ptr) {
; NDD-LABEL: cmov64rm_inv:
; NDD:       # %bb.0: # %entry
; NDD-NEXT:    movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
; NDD-NEXT:    testq %rdi, %rdi # encoding: [0x48,0x85,0xff]
; NDD-NEXT:    cmovnsq (%rdx), %rax # encoding: [0x48,0x0f,0x49,0x02]
; NDD-NEXT:    retq # encoding: [0xc3]
;
; MEM-LABEL: cmov64rm_inv:
; MEM:       # %bb.0: # %entry
; MEM-NEXT:    movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
; MEM-NEXT:    testq %rdi, %rdi # encoding: [0x48,0x85,0xff]
; MEM-NEXT:    js .LBB7_2 # encoding: [0x78,A]
; MEM-NEXT:    # fixup A - offset: 1, value: .LBB7_2, kind: FK_PCRel_1
; MEM-NEXT:  # %bb.1: # %entry
; MEM-NEXT:    movq (%rdx), %rax # encoding: [0x48,0x8b,0x02]
; MEM-NEXT:  .LBB7_2: # %entry
; MEM-NEXT:    retq # encoding: [0xc3]
entry:
  %y = load i64, ptr %y.ptr
  %cmp = icmp slt i64 %a, 0
  %cmov = select i1 %cmp, i64 %x, i64 %y
  ret i64 %cmov
}