# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc  -mtriple=x86_64 -run-pass x86-flags-copy-lowering -mattr=+ndd -verify-machineinstrs -o - %s | FileCheck --check-prefixes=CHECK,NDD %s
# RUN: llc  -mtriple=x86_64 -passes=x86-flags-copy-lowering -mattr=+ndd -verify-machineinstrs -o - %s | FileCheck --check-prefixes=CHECK,NDD %s
# RUN: llc  -mtriple=x86_64 -run-pass x86-flags-copy-lowering -mattr=+ndd,+nf -verify-machineinstrs -o - %s | FileCheck --check-prefixes=CHECK,NDD-NF %s
# RUN: llc  -mtriple=x86_64 -passes=x86-flags-copy-lowering -mattr=+ndd,+nf -verify-machineinstrs -o - %s | FileCheck --check-prefixes=CHECK,NDD-NF %s
# RUN: llc  -mtriple=x86_64 -run-pass x86-flags-copy-lowering -mattr=+ndd,+nf -x86-enable-apx-for-relocation=true -verify-machineinstrs -o - %s | FileCheck --check-prefixes=CHECK,NDD-NF %s
# RUN: llc  -mtriple=x86_64 -passes=x86-flags-copy-lowering -mattr=+ndd,+nf -x86-enable-apx-for-relocation=true -verify-machineinstrs -o - %s | FileCheck --check-prefixes=CHECK,NDD-NF %s

# Lower various interesting copy patterns of EFLAGS without using LAHF/SAHF.

...
---
name:            test_adc
body:             |
  bb.0:
    liveins: $rdi, $rsi

    ; CHECK-LABEL: name: test_adc
    ; CHECK: liveins: $rdi, $rsi
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi
    ; CHECK-NEXT: [[ADD64rr_ND:%[0-9]+]]:gr64 = ADD64rr_ND [[COPY]], [[COPY1]], implicit-def $eflags
    ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags
    ; CHECK-NEXT: INLINEASM &nop, sideeffect attdialect, clobber, implicit-def dead $eflags
    ; CHECK-NEXT: dead [[ADD8ri_ND:%[0-9]+]]:gr8 = ADD8ri_ND [[SETCCr]], 255, implicit-def $eflags
    ; CHECK-NEXT: [[ADC64ri32_ND:%[0-9]+]]:gr64 = ADC64ri32_ND [[ADD64rr_ND]], 42, implicit-def $eflags, implicit killed $eflags
    ; CHECK-NEXT: [[ADC64ri32_ND1:%[0-9]+]]:gr64 = ADC64ri32_ND [[ADC64ri32_ND]], 42, implicit-def $eflags, implicit $eflags
    ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[ADC64ri32_ND1]]
    ; CHECK-NEXT: RET 0
    %0:gr64 = COPY $rdi
    %1:gr64 = COPY $rsi
    %2:gr64 = ADD64rr_ND %0, %1, implicit-def $eflags
    %3:gr64 = COPY $eflags

    INLINEASM &nop, 1, 12, implicit-def dead $eflags

    $eflags = COPY %3
    %4:gr64 = ADC64ri32_ND %2:gr64, 42, implicit-def $eflags, implicit $eflags
    %5:gr64 = ADC64ri32_ND %4:gr64, 42, implicit-def $eflags, implicit $eflags
    MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %5

    RET 0

...
---
name:            test_sbb
body:             |
  bb.0:
    liveins: $rdi, $rsi

    ; CHECK-LABEL: name: test_sbb
    ; CHECK: liveins: $rdi, $rsi
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi
    ; CHECK-NEXT: [[SUB64rr_ND:%[0-9]+]]:gr64 = SUB64rr_ND [[COPY]], [[COPY1]], implicit-def $eflags
    ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags
    ; CHECK-NEXT: INLINEASM &nop, sideeffect attdialect, clobber, implicit-def dead $eflags
    ; CHECK-NEXT: dead [[ADD8ri_ND:%[0-9]+]]:gr8 = ADD8ri_ND [[SETCCr]], 255, implicit-def $eflags
    ; CHECK-NEXT: [[SBB64ri32_ND:%[0-9]+]]:gr64 = SBB64ri32_ND [[SUB64rr_ND]], 42, implicit-def $eflags, implicit killed $eflags
    ; CHECK-NEXT: [[SBB64ri32_ND1:%[0-9]+]]:gr64 = SBB64ri32_ND [[SBB64ri32_ND]], 42, implicit-def dead $eflags, implicit killed $eflags
    ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[SBB64ri32_ND1]]
    ; CHECK-NEXT: RET 0
    %0:gr64 = COPY $rdi
    %1:gr64 = COPY $rsi
    %2:gr64 = SUB64rr_ND %0, %1, implicit-def $eflags
    %3:gr64 = COPY killed $eflags

    INLINEASM &nop, 1, 12, implicit-def dead $eflags

    $eflags = COPY %3
    %4:gr64 = SBB64ri32_ND %2:gr64, 42, implicit-def $eflags, implicit killed $eflags
    %5:gr64 = SBB64ri32_ND %4:gr64, 42, implicit-def dead $eflags, implicit killed $eflags
    MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %5

    RET 0

...
---
name:            test_rcl
body:             |
  bb.0:
    liveins: $rdi, $rsi

    ; CHECK-LABEL: name: test_rcl
    ; CHECK: liveins: $rdi, $rsi
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi
    ; CHECK-NEXT: [[ADD64rr_ND:%[0-9]+]]:gr64 = ADD64rr_ND [[COPY]], [[COPY1]], implicit-def $eflags
    ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags
    ; CHECK-NEXT: INLINEASM &nop, sideeffect attdialect, clobber, implicit-def dead $eflags
    ; CHECK-NEXT: dead [[ADD8ri_ND:%[0-9]+]]:gr8 = ADD8ri_ND [[SETCCr]], 255, implicit-def $eflags
    ; CHECK-NEXT: [[RCL64r1_ND:%[0-9]+]]:gr64 = RCL64r1_ND [[ADD64rr_ND]], implicit-def $eflags, implicit killed $eflags
    ; CHECK-NEXT: [[RCL64r1_ND1:%[0-9]+]]:gr64 = RCL64r1_ND [[RCL64r1_ND]], implicit-def $eflags, implicit $eflags
    ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[RCL64r1_ND1]]
    ; CHECK-NEXT: RET 0
    %0:gr64 = COPY $rdi
    %1:gr64 = COPY $rsi
    %2:gr64 = ADD64rr_ND %0, %1, implicit-def $eflags
    %3:gr64 = COPY $eflags

    INLINEASM &nop, 1, 12, implicit-def dead $eflags

    $eflags = COPY %3
    %4:gr64 = RCL64r1_ND %2:gr64, implicit-def $eflags, implicit $eflags
    %5:gr64 = RCL64r1_ND %4:gr64, implicit-def $eflags, implicit $eflags
    MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %5

    RET 0

...
---
name:            test_rcr
body:             |
  bb.0:
    liveins: $rdi, $rsi

    ; CHECK-LABEL: name: test_rcr
    ; CHECK: liveins: $rdi, $rsi
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi
    ; CHECK-NEXT: [[ADD64rr_ND:%[0-9]+]]:gr64 = ADD64rr_ND [[COPY]], [[COPY1]], implicit-def $eflags
    ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags
    ; CHECK-NEXT: INLINEASM &nop, sideeffect attdialect, clobber, implicit-def dead $eflags
    ; CHECK-NEXT: dead [[ADD8ri_ND:%[0-9]+]]:gr8 = ADD8ri_ND [[SETCCr]], 255, implicit-def $eflags
    ; CHECK-NEXT: [[RCR64r1_ND:%[0-9]+]]:gr64 = RCR64r1_ND [[ADD64rr_ND]], implicit-def $eflags, implicit killed $eflags
    ; CHECK-NEXT: [[RCR64r1_ND1:%[0-9]+]]:gr64 = RCR64r1_ND [[RCR64r1_ND]], implicit-def $eflags, implicit $eflags
    ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[RCR64r1_ND1]]
    ; CHECK-NEXT: RET 0
    %0:gr64 = COPY $rdi
    %1:gr64 = COPY $rsi
    %2:gr64 = ADD64rr_ND %0, %1, implicit-def $eflags
    %3:gr64 = COPY $eflags

    INLINEASM &nop, 1, 12, implicit-def dead $eflags

    $eflags = COPY %3
    %4:gr64 = RCR64r1_ND %2:gr64, implicit-def $eflags, implicit $eflags
    %5:gr64 = RCR64r1_ND %4:gr64, implicit-def $eflags, implicit $eflags
    MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %5

    RET 0

...
---
name:            test_cmov
body:             |
  bb.0:
    liveins: $rdi, $rsi

    ; CHECK-LABEL: name: test_cmov
    ; CHECK: liveins: $rdi, $rsi
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi
    ; CHECK-NEXT: CMP64rr [[COPY]], [[COPY1]], implicit-def $eflags
    ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags
    ; CHECK-NEXT: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags
    ; CHECK-NEXT: [[SETCCr2:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags
    ; CHECK-NEXT: INLINEASM &nop, sideeffect attdialect, clobber, implicit-def dead $eflags
    ; CHECK-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags
    ; CHECK-NEXT: [[CMOV64rr_ND:%[0-9]+]]:gr64 = CMOV64rr_ND [[COPY]], [[COPY1]], 5, implicit killed $eflags
    ; CHECK-NEXT: TEST8rr [[SETCCr1]], [[SETCCr1]], implicit-def $eflags
    ; CHECK-NEXT: [[CMOV64rr_ND1:%[0-9]+]]:gr64 = CMOV64rr_ND [[COPY]], [[COPY1]], 5, implicit killed $eflags
    ; CHECK-NEXT: TEST8rr [[SETCCr2]], [[SETCCr2]], implicit-def $eflags
    ; CHECK-NEXT: [[CMOV64rr_ND2:%[0-9]+]]:gr64 = CMOV64rr_ND [[COPY]], [[COPY1]], 5, implicit killed $eflags
    ; CHECK-NEXT: TEST8rr [[SETCCr2]], [[SETCCr2]], implicit-def $eflags
    ; CHECK-NEXT: [[CMOV64rr_ND3:%[0-9]+]]:gr64 = CMOV64rr_ND [[COPY]], [[COPY1]], 4, implicit killed $eflags
    ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CMOV64rr_ND]]
    ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CMOV64rr_ND1]]
    ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CMOV64rr_ND2]]
    ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CMOV64rr_ND3]]
    ; CHECK-NEXT: RET 0
    %0:gr64 = COPY $rdi
    %1:gr64 = COPY $rsi
    CMP64rr %0, %1, implicit-def $eflags
    %2:gr64 = COPY $eflags

    INLINEASM &nop, 1, 12, implicit-def dead $eflags

    $eflags = COPY %2
    %3:gr64 = CMOV64rr_ND %0, %1, 7, implicit $eflags
    %4:gr64 = CMOV64rr_ND %0, %1, 2, implicit $eflags
    %5:gr64 = CMOV64rr_ND %0, %1, 4, implicit $eflags
    %6:gr64 = CMOV64rr_ND %0, %1, 5, implicit killed $eflags
    MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %3
    MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %4
    MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %5
    MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %6

    RET 0
...
---
name:            test_cfcmov
body:             |
  bb.0:
    liveins: $rdi, $rsi

    ; CHECK-LABEL: name: test_cfcmov
    ; CHECK: liveins: $rdi, $rsi
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi
    ; CHECK-NEXT: CMP64rr [[COPY]], [[COPY1]], implicit-def $eflags
    ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags
    ; CHECK-NEXT: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags
    ; CHECK-NEXT: [[SETCCr2:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags
    ; CHECK-NEXT: INLINEASM &nop, sideeffect attdialect, clobber, implicit-def dead $eflags
    ; CHECK-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags
    ; CHECK-NEXT: [[CFCMOV64rr:%[0-9]+]]:gr64 = CFCMOV64rr [[COPY1]], 5, implicit killed $eflags
    ; CHECK-NEXT: TEST8rr [[SETCCr1]], [[SETCCr1]], implicit-def $eflags
    ; CHECK-NEXT: [[CFCMOV64rr1:%[0-9]+]]:gr64 = CFCMOV64rr [[COPY1]], 5, implicit killed $eflags
    ; CHECK-NEXT: TEST8rr [[SETCCr2]], [[SETCCr2]], implicit-def $eflags
    ; CHECK-NEXT: [[CFCMOV64rr_ND:%[0-9]+]]:gr64 = CFCMOV64rr_ND [[COPY]], [[COPY1]], 5, implicit killed $eflags
    ; CHECK-NEXT: TEST8rr [[SETCCr2]], [[SETCCr2]], implicit-def $eflags
    ; CHECK-NEXT: [[CFCMOV64rr_ND1:%[0-9]+]]:gr64 = CFCMOV64rr_ND [[COPY]], [[COPY1]], 4, implicit killed $eflags
    ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CFCMOV64rr]]
    ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CFCMOV64rr1]]
    ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CFCMOV64rr_ND]]
    ; CHECK-NEXT: MOV64mr $rsp, 1, $noreg, -16, $noreg, killed [[CFCMOV64rr_ND1]]
    ; CHECK-NEXT: RET 0
    %0:gr64 = COPY $rdi
    %1:gr64 = COPY $rsi
    CMP64rr %0, %1, implicit-def $eflags
    %2:gr64 = COPY $eflags

    INLINEASM &nop, 1, 12, implicit-def dead $eflags

    $eflags = COPY %2
    %3:gr64 = CFCMOV64rr %1, 7, implicit $eflags
    %4:gr64 = CFCMOV64rr %1, 2, implicit $eflags
    %5:gr64 = CFCMOV64rr_ND %0, %1, 4, implicit $eflags
    %6:gr64 = CFCMOV64rr_ND %0, %1, 5, implicit killed $eflags
    MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %3
    MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %4
    MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %5
    MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %6

    RET 0
...
---
name:            test_ccmp
body:             |
  bb.0:
    liveins: $edi

    ; NDD-LABEL: name: test_ccmp
    ; NDD: liveins: $edi
    ; NDD-NEXT: {{  $}}
    ; NDD-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    ; NDD-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 1, implicit $eflags
    ; NDD-NEXT: [[ADD32rr:%[0-9]+]]:gr32 = ADD32rr $edi, $edi, implicit-def dead $eflags
    ; NDD-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags
    ; NDD-NEXT: CCMP32rr [[ADD32rr]], [[ADD32rr]], 0, 5, implicit-def $eflags, implicit killed $eflags
    ; NDD-NEXT: RET 0, $al
    ;
    ; NDD-NF-LABEL: name: test_ccmp
    ; NDD-NF: liveins: $edi
    ; NDD-NF-NEXT: {{  $}}
    ; NDD-NF-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    ; NDD-NF-NEXT: [[ADD32rr_NF:%[0-9]+]]:gr32 = ADD32rr_NF $edi, $edi
    ; NDD-NF-NEXT: CCMP32rr [[ADD32rr_NF]], [[ADD32rr_NF]], 0, 1, implicit-def $eflags, implicit $eflags
    ; NDD-NF-NEXT: RET 0, $al
    MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    %1:gr64 = COPY $eflags
    %2:gr32 = ADD32rr $edi, $edi, implicit-def dead $eflags
    $eflags = COPY %1
    CCMP32rr %2, %2, 0, 1, implicit-def $eflags, implicit $eflags
    RET 0, $al

...
---
name:            test_ctest
body:             |
  bb.0:
    liveins: $edi

    ; NDD-LABEL: name: test_ctest
    ; NDD: liveins: $edi
    ; NDD-NEXT: {{  $}}
    ; NDD-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    ; NDD-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 1, implicit $eflags
    ; NDD-NEXT: [[ADD32rr:%[0-9]+]]:gr32 = ADD32rr $edi, $edi, implicit-def dead $eflags
    ; NDD-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags
    ; NDD-NEXT: CTEST32rr [[ADD32rr]], [[ADD32rr]], 0, 5, implicit-def $eflags, implicit killed $eflags
    ; NDD-NEXT: RET 0, $al
    ;
    ; NDD-NF-LABEL: name: test_ctest
    ; NDD-NF: liveins: $edi
    ; NDD-NF-NEXT: {{  $}}
    ; NDD-NF-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    ; NDD-NF-NEXT: [[ADD32rr_NF:%[0-9]+]]:gr32 = ADD32rr_NF $edi, $edi
    ; NDD-NF-NEXT: CTEST32rr [[ADD32rr_NF]], [[ADD32rr_NF]], 0, 1, implicit-def $eflags, implicit $eflags
    ; NDD-NF-NEXT: RET 0, $al
    MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    %1:gr64 = COPY $eflags
    %2:gr32 = ADD32rr $edi, $edi, implicit-def dead $eflags
    $eflags = COPY %1
    CTEST32rr %2, %2, 0, 1, implicit-def $eflags, implicit $eflags
    RET 0, $al

...
---
name:            test_evitable_clobber
body:             |
  bb.0:
    liveins: $edi

    ; NDD-LABEL: name: test_evitable_clobber
    ; NDD: liveins: $edi
    ; NDD-NEXT: {{  $}}
    ; NDD-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    ; NDD-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags
    ; NDD-NEXT: [[ADD32rr_ND:%[0-9]+]]:gr32 = ADD32rr_ND $edi, $edi, implicit-def dead $eflags
    ; NDD-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags
    ; NDD-NEXT: $eax = CMOV32rr_ND $edi, [[ADD32rr_ND]], 5, implicit killed $eflags
    ; NDD-NEXT: RET 0, $al
    ;
    ; NDD-NF-LABEL: name: test_evitable_clobber
    ; NDD-NF: liveins: $edi
    ; NDD-NF-NEXT: {{  $}}
    ; NDD-NF-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    ; NDD-NF-NEXT: [[ADD32rr_NF_ND:%[0-9]+]]:gr32 = ADD32rr_NF_ND $edi, $edi
    ; NDD-NF-NEXT: $eax = CMOV32rr_ND $edi, [[ADD32rr_NF_ND]], 7, implicit $eflags
    ; NDD-NF-NEXT: RET 0, $al
    MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    %1:gr64 = COPY $eflags
    %2:gr32 = ADD32rr_ND $edi, $edi, implicit-def dead $eflags
    $eflags = COPY %1
    $eax = CMOV32rr_ND $edi, %2, 7, implicit $eflags
    RET 0, $al

...
---
name:            test_inevitable_clobber
body:             |
  bb.0:
    liveins: $edi

    ; CHECK-LABEL: name: test_inevitable_clobber
    ; CHECK: liveins: $edi
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    ; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags
    ; CHECK-NEXT: [[ADC32rr_ND:%[0-9]+]]:gr32 = ADC32rr_ND $edi, $edi, implicit-def dead $eflags, implicit $eflags
    ; CHECK-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags
    ; CHECK-NEXT: $eax = CMOV32rr_ND $edi, [[ADC32rr_ND]], 5, implicit killed $eflags
    ; CHECK-NEXT: RET 0, $al
    MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    %1:gr64 = COPY $eflags
    %2:gr32 = ADC32rr_ND $edi, $edi, implicit-def dead $eflags, implicit $eflags
    $eflags = COPY %1
    $eax = CMOV32rr_ND $edi, %2, 7, implicit $eflags
    RET 0, $al
...
---
name:            test_evitable_clobber_multiple_uses
body:             |
  bb.0:
    liveins: $edi

    ; NDD-LABEL: name: test_evitable_clobber_multiple_uses
    ; NDD: liveins: $edi
    ; NDD-NEXT: {{  $}}
    ; NDD-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    ; NDD-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags
    ; NDD-NEXT: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 9, implicit $eflags
    ; NDD-NEXT: [[ADD32rr_ND:%[0-9]+]]:gr32 = ADD32rr_ND $edi, $edi, implicit-def dead $eflags
    ; NDD-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags
    ; NDD-NEXT: $eax = CMOV32rr_ND $edi, [[ADD32rr_ND]], 5, implicit killed $eflags
    ; NDD-NEXT: [[ADD32rr_ND1:%[0-9]+]]:gr32 = ADD32rr_ND $edi, $eax, implicit-def dead $eflags
    ; NDD-NEXT: TEST8rr [[SETCCr1]], [[SETCCr1]], implicit-def $eflags
    ; NDD-NEXT: $eax = CMOV32rr_ND $edi, [[ADD32rr_ND1]], 5, implicit killed $eflags
    ; NDD-NEXT: RET 0, $al
    ;
    ; NDD-NF-LABEL: name: test_evitable_clobber_multiple_uses
    ; NDD-NF: liveins: $edi
    ; NDD-NF-NEXT: {{  $}}
    ; NDD-NF-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    ; NDD-NF-NEXT: [[ADD32rr_NF_ND:%[0-9]+]]:gr32 = ADD32rr_NF_ND $edi, $edi
    ; NDD-NF-NEXT: $eax = CMOV32rr_ND $edi, [[ADD32rr_NF_ND]], 7, implicit $eflags
    ; NDD-NF-NEXT: [[ADD32rr_NF_ND1:%[0-9]+]]:gr32 = ADD32rr_NF_ND $edi, $eax
    ; NDD-NF-NEXT: $eax = CMOV32rr_ND $edi, [[ADD32rr_NF_ND1]], 9, implicit $eflags
    ; NDD-NF-NEXT: RET 0, $al
    MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    %1:gr64 = COPY $eflags
    %2:gr32 = ADD32rr_ND $edi, $edi, implicit-def dead $eflags
    $eflags = COPY %1
    $eax = CMOV32rr_ND $edi, %2, 7, implicit $eflags
    %3:gr32 = ADD32rr_ND $edi, $eax, implicit-def dead $eflags
    $eflags = COPY %1
    $eax = CMOV32rr_ND $edi, %3, 9, implicit $eflags
    RET 0, $al

...
---
name:            test_mixed_clobber
body:             |
  bb.0:
    liveins: $edi

    ; NDD-LABEL: name: test_mixed_clobber
    ; NDD: liveins: $edi
    ; NDD-NEXT: {{  $}}
    ; NDD-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    ; NDD-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags
    ; NDD-NEXT: [[ADC32rr_ND:%[0-9]+]]:gr32 = ADC32rr_ND $edi, $edi, implicit-def dead $eflags, implicit $eflags
    ; NDD-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags
    ; NDD-NEXT: $eax = CMOV32rr_ND $edi, [[ADC32rr_ND]], 5, implicit killed $eflags
    ; NDD-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    ; NDD-NEXT: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 1, implicit $eflags
    ; NDD-NEXT: [[ADD32rr_ND:%[0-9]+]]:gr32 = ADD32rr_ND $edi, $edi, implicit-def dead $eflags
    ; NDD-NEXT: TEST8rr [[SETCCr1]], [[SETCCr1]], implicit-def $eflags
    ; NDD-NEXT: $eax = CMOV32rr_ND $edi, [[ADD32rr_ND]], 5, implicit killed $eflags
    ; NDD-NEXT: RET 0, $al
    ;
    ; NDD-NF-LABEL: name: test_mixed_clobber
    ; NDD-NF: liveins: $edi
    ; NDD-NF-NEXT: {{  $}}
    ; NDD-NF-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    ; NDD-NF-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags
    ; NDD-NF-NEXT: [[ADC32rr_ND:%[0-9]+]]:gr32 = ADC32rr_ND $edi, $edi, implicit-def dead $eflags, implicit $eflags
    ; NDD-NF-NEXT: TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags
    ; NDD-NF-NEXT: $eax = CMOV32rr_ND $edi, [[ADC32rr_ND]], 5, implicit killed $eflags
    ; NDD-NF-NEXT: MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    ; NDD-NF-NEXT: [[ADD32rr_NF_ND:%[0-9]+]]:gr32 = ADD32rr_NF_ND $edi, $edi
    ; NDD-NF-NEXT: $eax = CMOV32rr_ND $edi, [[ADD32rr_NF_ND]], 1, implicit $eflags
    ; NDD-NF-NEXT: RET 0, $al
    MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    %1:gr64 = COPY $eflags
    %2:gr32 = ADC32rr_ND $edi, $edi, implicit-def dead $eflags, implicit $eflags
    $eflags = COPY %1
    $eax = CMOV32rr_ND $edi, %2, 7, implicit $eflags
    MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    %3:gr64 = COPY $eflags
    %4:gr32 = ADD32rr_ND $edi, $edi, implicit-def dead $eflags
    $eflags = COPY %3
    $eax = CMOV32rr_ND $edi, %4, 1, implicit $eflags
    RET 0, $al
...
---
name:            test_evitable_clobber_crossbb
body:             |
  ; NDD-LABEL: name: test_evitable_clobber_crossbb
  ; NDD: bb.0:
  ; NDD-NEXT:   successors: %bb.1(0x80000000)
  ; NDD-NEXT:   liveins: $edi
  ; NDD-NEXT: {{  $}}
  ; NDD-NEXT:   MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
  ; NDD-NEXT:   [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags
  ; NDD-NEXT:   [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags
  ; NDD-NEXT:   [[ADD32rr_ND:%[0-9]+]]:gr32 = ADD32rr_ND $edi, $edi, implicit-def dead $eflags
  ; NDD-NEXT:   JCC_1 %bb.1, 4, implicit $eflags
  ; NDD-NEXT:   RET 0, $al
  ; NDD-NEXT: {{  $}}
  ; NDD-NEXT: bb.1:
  ; NDD-NEXT:   TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags
  ; NDD-NEXT:   $eax = CMOV32rr_ND $edi, [[ADD32rr_ND]], 5, implicit killed $eflags
  ; NDD-NEXT:   dead [[ADD8ri_ND:%[0-9]+]]:gr8 = ADD8ri_ND [[SETCCr1]], 255, implicit-def $eflags
  ; NDD-NEXT:   $eax = ADC32rr_ND $eax, $edi, implicit-def dead $eflags, implicit killed $eflags
  ; NDD-NEXT:   RET 0, $al
  ;
  ; NDD-NF-LABEL: name: test_evitable_clobber_crossbb
  ; NDD-NF: bb.0:
  ; NDD-NF-NEXT:   successors: %bb.1(0x80000000)
  ; NDD-NF-NEXT:   liveins: $edi
  ; NDD-NF-NEXT: {{  $}}
  ; NDD-NF-NEXT:   MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
  ; NDD-NF-NEXT:   [[ADD32rr_NF_ND:%[0-9]+]]:gr32 = ADD32rr_NF_ND $edi, $edi
  ; NDD-NF-NEXT:   JCC_1 %bb.1, 4, implicit $eflags
  ; NDD-NF-NEXT:   RET 0, $al
  ; NDD-NF-NEXT: {{  $}}
  ; NDD-NF-NEXT: bb.1:
  ; NDD-NF-NEXT:   liveins: $eflags
  ; NDD-NF-NEXT: {{  $}}
  ; NDD-NF-NEXT:   $eax = CMOV32rr_ND $edi, [[ADD32rr_NF_ND]], 7, implicit $eflags
  ; NDD-NF-NEXT:   $eax = ADC32rr_ND $eax, $edi, implicit-def dead $eflags, implicit $eflags
  ; NDD-NF-NEXT:   RET 0, $al
  bb.0:
    liveins: $edi

    MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    %1:gr64 = COPY $eflags
    %2:gr32 = ADD32rr_ND $edi, $edi, implicit-def dead $eflags
    JCC_1 %bb.1, 4, implicit $eflags
    RET 0, $al

  bb.1:
    $eflags = COPY %1
    $eax = CMOV32rr_ND $edi, %2, 7, implicit $eflags
    $eax = ADC32rr_ND $eax, $edi, implicit-def dead $eflags, implicit $eflags
    RET 0, $al
...
---
name:            test_inevitable_clobber_crossbb
body:             |
  ; CHECK-LABEL: name: test_inevitable_clobber_crossbb
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT:   liveins: $edi
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
  ; CHECK-NEXT:   [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags
  ; CHECK-NEXT:   [[ADC32rr_ND:%[0-9]+]]:gr32 = ADC32rr_ND $edi, $edi, implicit-def dead $eflags, implicit $eflags
  ; CHECK-NEXT:   JCC_1 %bb.1, 4, implicit $eflags
  ; CHECK-NEXT:   RET 0, $al
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags
  ; CHECK-NEXT:   $eax = CMOV32rr_ND $edi, [[ADC32rr_ND]], 5, implicit killed $eflags
  ; CHECK-NEXT:   RET 0, $al
  bb.0:
    liveins: $edi

    MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    %1:gr64 = COPY $eflags
    %2:gr32 = ADC32rr_ND $edi, $edi, implicit-def dead $eflags, implicit $eflags
    JCC_1 %bb.1, 4, implicit $eflags
    RET 0, $al

  bb.1:
    $eflags = COPY %1
    $eax = CMOV32rr_ND $edi, %2, 7, implicit $eflags
    RET 0, $al
...
---
name:            test_evitable_clobber_crossbb_complex
body:             |
  ; NDD-LABEL: name: test_evitable_clobber_crossbb_complex
  ; NDD: bb.0:
  ; NDD-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
  ; NDD-NEXT:   liveins: $edi
  ; NDD-NEXT: {{  $}}
  ; NDD-NEXT:   MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
  ; NDD-NEXT:   [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags
  ; NDD-NEXT:   [[SUB32rr_ND:%[0-9]+]]:gr32 = SUB32rr_ND $edi, $edi, implicit-def dead $eflags
  ; NDD-NEXT:   JCC_1 %bb.2, 4, implicit $eflags
  ; NDD-NEXT: {{  $}}
  ; NDD-NEXT: bb.1:
  ; NDD-NEXT:   successors: %bb.3(0x80000000)
  ; NDD-NEXT: {{  $}}
  ; NDD-NEXT:   $eax = IMUL32rr_ND $eax, $edi, implicit-def dead $eflags
  ; NDD-NEXT:   JMP_1 %bb.3
  ; NDD-NEXT: {{  $}}
  ; NDD-NEXT: bb.2:
  ; NDD-NEXT:   successors: %bb.3(0x80000000)
  ; NDD-NEXT: {{  $}}
  ; NDD-NEXT:   $eax = IMUL32rr $eax, $esi, implicit-def dead $eflags
  ; NDD-NEXT:   JMP_1 %bb.3
  ; NDD-NEXT: {{  $}}
  ; NDD-NEXT: bb.3:
  ; NDD-NEXT:   TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags
  ; NDD-NEXT:   $eax = CMOV32rr_ND $edi, [[SUB32rr_ND]], 5, implicit killed $eflags
  ; NDD-NEXT:   RET 0, $al
  ;
  ; NDD-NF-LABEL: name: test_evitable_clobber_crossbb_complex
  ; NDD-NF: bb.0:
  ; NDD-NF-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
  ; NDD-NF-NEXT:   liveins: $edi
  ; NDD-NF-NEXT: {{  $}}
  ; NDD-NF-NEXT:   MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
  ; NDD-NF-NEXT:   [[SUB32rr_NF_ND:%[0-9]+]]:gr32 = SUB32rr_NF_ND $edi, $edi
  ; NDD-NF-NEXT:   JCC_1 %bb.2, 4, implicit $eflags
  ; NDD-NF-NEXT: {{  $}}
  ; NDD-NF-NEXT: bb.1:
  ; NDD-NF-NEXT:   successors: %bb.3(0x80000000)
  ; NDD-NF-NEXT:   liveins: $eflags
  ; NDD-NF-NEXT: {{  $}}
  ; NDD-NF-NEXT:   $eax = IMUL32rr_NF_ND $eax, $edi
  ; NDD-NF-NEXT:   JMP_1 %bb.3
  ; NDD-NF-NEXT: {{  $}}
  ; NDD-NF-NEXT: bb.2:
  ; NDD-NF-NEXT:   successors: %bb.3(0x80000000)
  ; NDD-NF-NEXT:   liveins: $eflags
  ; NDD-NF-NEXT: {{  $}}
  ; NDD-NF-NEXT:   $eax = IMUL32rr_NF $eax, $esi
  ; NDD-NF-NEXT:   JMP_1 %bb.3
  ; NDD-NF-NEXT: {{  $}}
  ; NDD-NF-NEXT: bb.3:
  ; NDD-NF-NEXT:   liveins: $eflags
  ; NDD-NF-NEXT: {{  $}}
  ; NDD-NF-NEXT:   $eax = CMOV32rr_ND $edi, [[SUB32rr_NF_ND]], 7, implicit $eflags
  ; NDD-NF-NEXT:   RET 0, $al
  bb.0:
    liveins: $edi

    MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    %1:gr64 = COPY $eflags
    %2:gr32 = SUB32rr_ND $edi, $edi, implicit-def dead $eflags
    JCC_1 %bb.2, 4, implicit $eflags

  bb.1:
    $eax = IMUL32rr_ND $eax, $edi, implicit-def dead $eflags
    JMP_1 %bb.3

  bb.2:
    $eax = IMUL32rr $eax, $esi, implicit-def dead $eflags
    JMP_1 %bb.3

  bb.3:
    $eflags = COPY %1
    $eax = CMOV32rr_ND $edi, %2, 7, implicit $eflags
    RET 0, $al
...
---
name:            test_inevitable_clobber_crossbb_complex
body:             |
  ; CHECK-LABEL: name: test_inevitable_clobber_crossbb_complex
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
  ; CHECK-NEXT:   liveins: $edi
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
  ; CHECK-NEXT:   [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags
  ; CHECK-NEXT:   [[SUB32rr_ND:%[0-9]+]]:gr32 = SUB32rr_ND $edi, $edi, implicit-def dead $eflags
  ; CHECK-NEXT:   JCC_1 %bb.2, 4, implicit $eflags
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   $eax = IMUL32rr_ND $eax, $edi, implicit-def dead $eflags
  ; CHECK-NEXT:   JMP_1 %bb.3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   $eax = SBB32rr $eax, $esi, implicit-def dead $eflags, implicit $eflags
  ; CHECK-NEXT:   JMP_1 %bb.3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.3:
  ; CHECK-NEXT:   TEST8rr [[SETCCr]], [[SETCCr]], implicit-def $eflags
  ; CHECK-NEXT:   $eax = CMOV32rr_ND $edi, [[SUB32rr_ND]], 5, implicit killed $eflags
  ; CHECK-NEXT:   RET 0, $al
  bb.0:
    liveins: $edi

    MUL32r $edi, implicit-def $eax, implicit-def dead $edx, implicit-def $eflags, implicit $eax
    %1:gr64 = COPY $eflags
    %2:gr32 = SUB32rr_ND $edi, $edi, implicit-def dead $eflags
    JCC_1 %bb.2, 4, implicit $eflags

  bb.1:
    $eax = IMUL32rr_ND $eax, $edi, implicit-def dead $eflags
    JMP_1 %bb.3

  bb.2:
    $eax = SBB32rr $eax, $esi, implicit-def dead $eflags, implicit $eflags
    JMP_1 %bb.3

  bb.3:
    $eflags = COPY %1
    $eax = CMOV32rr_ND $edi, %2, 7, implicit $eflags
    RET 0, $al
...