; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s
;
; Verify that folding NDD instructions to non-NDD with memory operands does not
; crash when the fold goes through the two-address path (IsTwoAddr=true).
; This is a regression test for a segfault in foldMemoryOperandImpl where
; NewMI->getOperand(1).setReg() was called on a memory operand instead of a
; register operand after fuseTwoAddrInst.

define void @ndd_fold_twoaddr(ptr %0, i64 %1, ptr %2, i64 %3, i1 %4) nounwind {
; CHECK-LABEL: ndd_fold_twoaddr:
; CHECK:       # %bb.0:
; CHECK-NEXT:    pushq %rbp
; CHECK-NEXT:    pushq %r15
; CHECK-NEXT:    pushq %r14
; CHECK-NEXT:    pushq %r13
; CHECK-NEXT:    pushq %r12
; CHECK-NEXT:    pushq %rbx
; CHECK-NEXT:    subq $24, %rsp
; CHECK-NEXT:    movl %r8d, %ebx
; CHECK-NEXT:    movq %rcx, %r14
; CHECK-NEXT:    movq %rdx, %r15
; CHECK-NEXT:    movq %rsi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT:    movq %rdi, %r13
; CHECK-NEXT:    movq $0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill
; CHECK-NEXT:    movq %rcx, %r12
; CHECK-NEXT:    movq %rcx, %rbp
; CHECK-NEXT:    .p2align 4
; CHECK-NEXT:  .LBB0_2: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT:    movq %rbp, %rdi
; CHECK-NEXT:    movq %r13, %rsi
; CHECK-NEXT:    callq *%r15
; CHECK-NEXT:    addq %r14, %rbp
; CHECK-NEXT:    testb $1, %bl
; CHECK-NEXT:    jne .LBB0_2
; CHECK-NEXT:  # %bb.1: # in Loop: Header=BB0_2 Depth=1
; CHECK-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
; CHECK-NEXT:    addq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Reload
; CHECK-NEXT:    addq %rax, %r12
; CHECK-NEXT:    movq %r12, %rbp
; CHECK-NEXT:    jmp .LBB0_2
  br label %6

6:
  %7 = phi ptr [ %10, %9 ], [ null, %5 ]
  %8 = icmp ugt ptr %7, null
  br label %11

9:
  %10 = getelementptr i8, ptr %7, i64 %1
  br label %6

11:
  %12 = phi ptr [ %13, %11 ], [ %7, %6 ]
  %13 = getelementptr i8, ptr %12, i64 %3
  %14 = tail call i32 %2(ptr %13, ptr %0)
  br i1 %4, label %11, label %9
}