; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s -mtriple=x86_64-pc-windows-gnu -mattr=ndd -verify-machineinstrs | FileCheck %s

define ptr @foo(ptr %a, i32 %b, ptr %c, ptr %d, i32 %e, i32 %f, i32 %g) nounwind {
; CHECK-LABEL: foo:
; CHECK:       # %bb.0: # %l0
; CHECK-NEXT:    pushq %r15
; CHECK-NEXT:    pushq %r14
; CHECK-NEXT:    pushq %r13
; CHECK-NEXT:    pushq %r12
; CHECK-NEXT:    pushq %rsi
; CHECK-NEXT:    pushq %rdi
; CHECK-NEXT:    pushq %rbp
; CHECK-NEXT:    pushq %rbx
; CHECK-NEXT:    subq $40, %rsp
; CHECK-NEXT:    movq %r9, %r14
; CHECK-NEXT:    movq %r8, %rbx
; CHECK-NEXT:    movl %edx, %esi
; CHECK-NEXT:    movq %rcx, %rdi
; CHECK-NEXT:    movl {{[0-9]+}}(%rsp), %r15d
; CHECK-NEXT:    movl {{[0-9]+}}(%rsp), %r13d
; CHECK-NEXT:    xorl %ebp, %ebp
; CHECK-NEXT:    xorl %ecx, %ecx
; CHECK-NEXT:    callq bitstob
; CHECK-NEXT:    cmpl $-1, %r15d
; CHECK-NEXT:    movl $-1, %r12d
; CHECK-NEXT:    cmovll %r15d, %r12d
; CHECK-NEXT:    cmpl $5, %r13d
; CHECK-NEXT:    ja .LBB0_5
; CHECK-NEXT:  # %bb.1: # %l0
; CHECK-NEXT:    movl $3, %eax
; CHECK-NEXT:    btl %r13d, %eax
; CHECK-NEXT:    jb .LBB0_4
; CHECK-NEXT:  # %bb.2: # %l0
; CHECK-NEXT:    movl $20, %eax
; CHECK-NEXT:    btl %r13d, %eax
; CHECK-NEXT:    jb .LBB0_6
; CHECK-NEXT:  # %bb.3: # %l1
; CHECK-NEXT:    movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT:    movl %eax, %ebp
; CHECK-NEXT:  .LBB0_4: # %.sink.split
; CHECK-NEXT:    movl %ebp, (%r14)
; CHECK-NEXT:  .LBB0_5: # %l2
; CHECK-NEXT:    callq __rv_alloc_D2A
; CHECK-NEXT:    movl $0, (%rbx)
; CHECK-NEXT:    movl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT:    subl %eax, %r12d, %eax
; CHECK-NEXT:    movq 0, %rcx
; CHECK-NEXT:    leal 1(%rax,%r15), %eax
; CHECK-NEXT:    movl %eax, (%rdi)
; CHECK-NEXT:    callq __Bfree_D2A
; CHECK-NEXT:    movl %esi, (%rdi)
; CHECK-NEXT:  .LBB0_6: # %common.ret1
; CHECK-NEXT:    xorl %eax, %eax
; CHECK-NEXT:    addq $40, %rsp
; CHECK-NEXT:    popq %rbx
; CHECK-NEXT:    popq %rbp
; CHECK-NEXT:    popq %rdi
; CHECK-NEXT:    popq %rsi
; CHECK-NEXT:    popq %r12
; CHECK-NEXT:    popq %r13
; CHECK-NEXT:    popq %r14
; CHECK-NEXT:    popq %r15
; CHECK-NEXT:    retq
l0:
  %x = tail call ptr @bitstob(ptr null)
  %y = tail call i32 @llvm.smin.i32(i32 %g, i32 -1)
  switch i32 %e, label %l2 [
    i32 0, label %.sink.split
    i32 1, label %.sink.split
    i32 2, label %common.ret1
    i32 4, label %common.ret1
    i32 3, label %l1
    i32 5, label %l1
  ]

common.ret1:                                      ; preds = %l2, %l0, %l0
  ret ptr null

l1:                                               ; preds = %l0, %l0
  br label %.sink.split

.sink.split:                                      ; preds = %l0, %l0, %l1
  %.sink = phi i32 [ %f, %l1 ], [ 0, %l0 ], [ 0, %l0 ]
  store i32 %.sink, ptr %d, align 4
  br label %l2

l2:                                               ; preds = %.sink.split, %l0
  %b2 = tail call ptr @__rv_alloc_D2A()
  store i32 0, ptr %c, align 4
  %reass.sub = sub i32 %y, %f
  %b3 = add i32 %reass.sub, 1
  %b4 = load volatile ptr, ptr null, align 4294967296
  %b5 = add i32 %b3, %g
  store i32 %b5, ptr %a, align 4
  tail call void @__Bfree_D2A()
  store i32 %b, ptr %a, align 4
  br label %common.ret1
}

declare ptr @bitstob(ptr)
declare void @__Bfree_D2A()
declare ptr @__rv_alloc_D2A()
declare i32 @llvm.smin.i32(i32, i32)

define i64 @bar(ptr %a, i64 %b, ptr %f, ptr %c, ptr %d, i8 %e, i64 %g, ptr %h, ptr %i, i8 %j, i8 %b0, i8 %b1, i8 %b2) nounwind {
; CHECK-LABEL: bar:
; CHECK:       # %bb.0: # %b3
; CHECK-NEXT:    pushq %r15
; CHECK-NEXT:    pushq %r14
; CHECK-NEXT:    pushq %r13
; CHECK-NEXT:    pushq %r12
; CHECK-NEXT:    pushq %rsi
; CHECK-NEXT:    pushq %rdi
; CHECK-NEXT:    pushq %rbp
; CHECK-NEXT:    pushq %rbx
; CHECK-NEXT:    pushq %rax
; CHECK-NEXT:    movq %rdx, (%rsp) # 8-byte Spill
; CHECK-NEXT:    movzbl {{[0-9]+}}(%rsp), %edx
; CHECK-NEXT:    movzbl {{[0-9]+}}(%rsp), %r10d
; CHECK-NEXT:    movq {{[0-9]+}}(%rsp), %rbx
; CHECK-NEXT:    movq {{[0-9]+}}(%rsp), %rdi
; CHECK-NEXT:    movzbl {{[0-9]+}}(%rsp), %r15d
; CHECK-NEXT:    xorl %r12d, %r12d
; CHECK-NEXT:    .p2align 4
; CHECK-NEXT:  .LBB1_1: # %b4
; CHECK-NEXT:    # =>This Loop Header: Depth=1
; CHECK-NEXT:    # Child Loop BB1_2 Depth 2
; CHECK-NEXT:    movq (%rsp), %rax # 8-byte Reload
; CHECK-NEXT:    imulq %rax, %r12
; CHECK-NEXT:    xorl %r13d, %r13d
; CHECK-NEXT:    movzbl {{[0-9]+}}(%rsp), %r11d
; CHECK-NEXT:    movzbl {{[0-9]+}}(%rsp), %esi
; CHECK-NEXT:    movq {{[0-9]+}}(%rsp), %r14
; CHECK-NEXT:    .p2align 4
; CHECK-NEXT:  .LBB1_2: # %b6
; CHECK-NEXT:    # Parent Loop BB1_1 Depth=1
; CHECK-NEXT:    # => This Inner Loop Header: Depth=2
; CHECK-NEXT:    movzbl (%rbx), %eax
; CHECK-NEXT:    movq %rdi, %rbp
; CHECK-NEXT:    movq %rbx, %rdi
; CHECK-NEXT:    movl %r10d, %ebx
; CHECK-NEXT:    movl %edx, %r10d
; CHECK-NEXT:    movb $1, %dl
; CHECK-NEXT:    subb %al, %dl
; CHECK-NEXT:    movb %r11b, (%r14)
; CHECK-NEXT:    movq {{[0-9]+}}(%rsp), %rax
; CHECK-NEXT:    movb %sil, (%rax)
; CHECK-NEXT:    movb %dl, (%r8)
; CHECK-NEXT:    movl %r10d, %edx
; CHECK-NEXT:    movl %ebx, %r10d
; CHECK-NEXT:    movq %rdi, %rbx
; CHECK-NEXT:    movq %rbp, %rdi
; CHECK-NEXT:    movb %r10b, 0
; CHECK-NEXT:    movb %dl, (%rcx,%r12)
; CHECK-NEXT:    movb %r15b, (%r9)
; CHECK-NEXT:    testq %r13, %r13
; CHECK-NEXT:    movq %rbp, %r13
; CHECK-NEXT:    jne .LBB1_2
; CHECK-NEXT:  # %bb.3: # in Loop: Header=BB1_1 Depth=1
; CHECK-NEXT:    movl $1, %r12d
; CHECK-NEXT:    jmp .LBB1_1
b3:
  br label %b4

b4:                                               ; preds = %b6, %b3
  %b5 = phi i64 [ 0, %b3 ], [ 1, %b6 ]
  br label %b6

b6:                                               ; preds = %b6, %b4
  %b7 = phi i64 [ 0, %b4 ], [ %g, %b6 ]
  %b8 = load i8, ptr %i, align 1
  %b9 = sub i8 1, %b8
  store i8 %b1, ptr %h, align 1
  store i8 %j, ptr %d, align 1
  store i8 %b9, ptr %f, align 1
  store i8 %b0, ptr null, align 1
  %f0 = mul i64 %b5, %b
  %f1 = getelementptr i8, ptr %a, i64 %f0
  store i8 %b2, ptr %f1, align 1
  store i8 %e, ptr %c, align 1
  %f2 = icmp eq i64 %b7, 0
  br i1 %f2, label %b4, label %b6
}

define i32 @baz(ptr %a, ptr %b, ptr %c, ptr %d, i64 %e, i32 %f, i32 %g, i1 %h) nounwind {
; CHECK-LABEL: baz:
; CHECK:       # %bb.0: # %.split
; CHECK-NEXT:    pushq %r15
; CHECK-NEXT:    pushq %r14
; CHECK-NEXT:    pushq %r13
; CHECK-NEXT:    pushq %r12
; CHECK-NEXT:    pushq %rsi
; CHECK-NEXT:    pushq %rdi
; CHECK-NEXT:    pushq %rbp
; CHECK-NEXT:    pushq %rbx
; CHECK-NEXT:    subq $72, %rsp
; CHECK-NEXT:    movq %r9, %rdi
; CHECK-NEXT:    movq %r8, %rbx
; CHECK-NEXT:    movq %rdx, %r14
; CHECK-NEXT:    movq %rcx, %r15
; CHECK-NEXT:    xorl %esi, %esi
; CHECK-NEXT:    movzbl {{[0-9]+}}(%rsp), %ebp
; CHECK-NEXT:    movl {{[0-9]+}}(%rsp), %r12d
; CHECK-NEXT:    movq {{[0-9]+}}(%rsp), %r13
; CHECK-NEXT:    xorl %eax, %eax
; CHECK-NEXT:    .p2align 4
; CHECK-NEXT:  .LBB2_1: # %.preheader14
; CHECK-NEXT:    # =>This Loop Header: Depth=1
; CHECK-NEXT:    # Child Loop BB2_3 Depth 2
; CHECK-NEXT:    testb $1, %bpl
; CHECK-NEXT:    jne .LBB2_6
; CHECK-NEXT:  # %bb.2: # %j.preheader
; CHECK-NEXT:    # in Loop: Header=BB2_1 Depth=1
; CHECK-NEXT:    movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
; CHECK-NEXT:    .p2align 4
; CHECK-NEXT:  .LBB2_3: # %j
; CHECK-NEXT:    # Parent Loop BB2_1 Depth=1
; CHECK-NEXT:    # => This Inner Loop Header: Depth=2
; CHECK-NEXT:    movl %eax, 0
; CHECK-NEXT:    movq %r13, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    movq %rdi, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    movq $0, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    movq %r15, %rcx
; CHECK-NEXT:    movq %r14, %rdx
; CHECK-NEXT:    movq %rbx, %r8
; CHECK-NEXT:    xorl %r9d, %r9d
; CHECK-NEXT:    callq *%rsi
; CHECK-NEXT:    testb $1, %bpl
; CHECK-NEXT:    movl %r12d, %eax
; CHECK-NEXT:    je .LBB2_3
; CHECK-NEXT:  # %bb.4: # %b2
; CHECK-NEXT:    # in Loop: Header=BB2_1 Depth=1
; CHECK-NEXT:    movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload
; CHECK-NEXT:    orl {{[0-9]+}}(%rsp), %eax
; CHECK-NEXT:    testb $1, %bpl
; CHECK-NEXT:    je .LBB2_1
; CHECK-NEXT:  # %bb.5:
; CHECK-NEXT:    movl $1, %esi
; CHECK-NEXT:  .LBB2_6: # %.loopexit
; CHECK-NEXT:    movl %esi, %eax
; CHECK-NEXT:    addq $72, %rsp
; CHECK-NEXT:    popq %rbx
; CHECK-NEXT:    popq %rbp
; CHECK-NEXT:    popq %rdi
; CHECK-NEXT:    popq %rsi
; CHECK-NEXT:    popq %r12
; CHECK-NEXT:    popq %r13
; CHECK-NEXT:    popq %r14
; CHECK-NEXT:    popq %r15
; CHECK-NEXT:    retq
.split:
  br label %.preheader14

.preheader14:                                     ; preds = %b2, %.split
  %i = phi i32 [ %b3, %b2 ], [ 0, %.split ]
  br i1 %h, label %.loopexit, label %j

j:                                                ; preds = %j, %.preheader14
  %b0 = phi i32 [ %g, %j ], [ %i, %.preheader14 ]
  store i32 %b0, ptr null, align 4
  %b1 = call i32 null(ptr %a, ptr %b, ptr %c, ptr null, ptr null, ptr %d, i64 %e)
  br i1 %h, label %b2, label %j

b2:                                               ; preds = %j
  %b3 = or i32 %i, %f
  br i1 %h, label %.loopexit, label %.preheader14

.loopexit:                                        ; preds = %b2, %.preheader14
  %b4 = phi i32 [ 0, %.preheader14 ], [ 1, %b2 ]
  ret i32 %b4
}

define i32 @pr190962(ptr %a, ptr %b, ptr %c, i64 %d, i64 %e, i64 %f) nounwind {
; CHECK-LABEL: pr190962:
; CHECK:       # %bb.0:
; CHECK-NEXT:    pushq %r15
; CHECK-NEXT:    pushq %r14
; CHECK-NEXT:    pushq %r13
; CHECK-NEXT:    pushq %r12
; CHECK-NEXT:    pushq %rsi
; CHECK-NEXT:    pushq %rdi
; CHECK-NEXT:    pushq %rbp
; CHECK-NEXT:    pushq %rbx
; CHECK-NEXT:    subq $56, %rsp
; CHECK-NEXT:    movq %r9, %rdi
; CHECK-NEXT:    movq %rdx, %rbx
; CHECK-NEXT:    movq %rcx, %rsi
; CHECK-NEXT:    movq {{[0-9]+}}(%rsp), %r14
; CHECK-NEXT:    callq f2
; CHECK-NEXT:    imulq %rdi, %r14, %rax
; CHECK-NEXT:    testq %rax, %rax
; CHECK-NEXT:    je .LBB3_3
; CHECK-NEXT:  # %bb.1: # %l1
; CHECK-NEXT:    movq {{[0-9]+}}(%rsp), %r13
; CHECK-NEXT:    movq 0, %r15
; CHECK-NEXT:    callq f2
; CHECK-NEXT:    movq 0, %r12
; CHECK-NEXT:    xorl %ebp, %ebp
; CHECK-NEXT:    orq %r13, %r15
; CHECK-NEXT:    jne .LBB3_2
; CHECK-NEXT:  # %bb.4: # %l2
; CHECK-NEXT:    movq %rax, %r14
; CHECK-NEXT:    movq %rbx, %rcx
; CHECK-NEXT:    callq f4
; CHECK-NEXT:    movl $1, %ebp
; CHECK-NEXT:    orq %r12, %r14
; CHECK-NEXT:    je .LBB3_5
; CHECK-NEXT:  .LBB3_2: # %common.ret1.sink.split
; CHECK-NEXT:    callq f3
; CHECK-NEXT:    xorl %ecx, %ecx
; CHECK-NEXT:    xorl %edx, %edx
; CHECK-NEXT:    xorl %r8d, %r8d
; CHECK-NEXT:    movl %ebp, %r9d
; CHECK-NEXT:    callq f1
; CHECK-NEXT:    callq f3
; CHECK-NEXT:  .LBB3_3: # %common.ret1
; CHECK-NEXT:    xorl %eax, %eax
; CHECK-NEXT:    addq $56, %rsp
; CHECK-NEXT:    popq %rbx
; CHECK-NEXT:    popq %rbp
; CHECK-NEXT:    popq %rdi
; CHECK-NEXT:    popq %rsi
; CHECK-NEXT:    popq %r12
; CHECK-NEXT:    popq %r13
; CHECK-NEXT:    popq %r14
; CHECK-NEXT:    popq %r15
; CHECK-NEXT:    retq
; CHECK-NEXT:  .LBB3_5: # %l3
; CHECK-NEXT:    testq %rdi, %rdi
; CHECK-NEXT:    movq {{[0-9]+}}(%rsp), %rax
; CHECK-NEXT:    je .LBB3_3
; CHECK-NEXT:  # %bb.6: # %l4
; CHECK-NEXT:    movl $0, (%rsi)
; CHECK-NEXT:    movq %rax, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    movq $0, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    movq $0, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    xorl %ecx, %ecx
; CHECK-NEXT:    xorl %edx, %edx
; CHECK-NEXT:    xorl %r8d, %r8d
; CHECK-NEXT:    xorl %r9d, %r9d
; CHECK-NEXT:    callq f1
  %g = tail call i64 @f2()
  %h = mul i64 %e, %d
  %i = icmp eq i64 %h, 0
  br i1 %i, label %common.ret1, label %l1

common.ret1.sink.split:                           ; preds = %l2, %l1
  %.sink = phi i32 [ 0, %l1 ], [ 1, %l2 ]
  tail call void @f3()
  %b0 = tail call i32 (i32, ptr, ...) @f1(i32 0, ptr null, ptr null, i32 %.sink)
  tail call void @f3()
  br label %common.ret1

common.ret1:                                      ; preds = %common.ret1.sink.split, %l3, %6
  ret i32 0

l1:                                               ; preds = %6
  %b2 = load volatile i64, ptr null, align 4294967296
  %b3 = tail call i64 @f2()
  %b4 = load volatile i64, ptr null, align 4294967296
  %b5 = or i64 %b2, %f
  %.not = icmp eq i64 %b5, 0
  br i1 %.not, label %l2, label %common.ret1.sink.split

l2:                                               ; preds = %l1
  %b7 = tail call i64 @f4(ptr %b)
  %b8 = or i64 %b4, %b3
  %.not1 = icmp eq i64 %b8, 0
  br i1 %.not1, label %l3, label %common.ret1.sink.split

l3:                                               ; preds = %l2
  %c0 = icmp eq i64 %d, 0
  br i1 %c0, label %common.ret1, label %l4

l4:                                               ; preds = %l3
  store i32 0, ptr %a, align 4
  %c2 = tail call i32 (i32, ptr, ...) @f1(i32 0, ptr null, ptr null, i32 0, i64 0, i64 0, i64 %e)
  unreachable
}

declare i32 @f1(i32, ptr, ...)
declare i64 @f2()
declare void @f3()
declare i64 @f4(ptr)