; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 -fast-isel | FileCheck %s --check-prefixes=SSE2-FAST
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s --check-prefixes=AVX
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx -fast-isel | FileCheck %s --check-prefixes=AVX-FAST
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+f16c | FileCheck %s --check-prefixes=F16C
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+f16c -fast-isel | FileCheck %s --check-prefixes=F16C-FAST

define half @test_fneg(half %a) nounwind {
; SSE2-LABEL: test_fneg:
; SSE2:       # %bb.0:
; SSE2-NEXT:    xorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-NEXT:    retq
;
; SSE2-FAST-LABEL: test_fneg:
; SSE2-FAST:       # %bb.0:
; SSE2-FAST-NEXT:    xorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-FAST-NEXT:    retq
;
; AVX-LABEL: test_fneg:
; AVX:       # %bb.0:
; AVX-NEXT:    vxorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; AVX-NEXT:    retq
;
; AVX-FAST-LABEL: test_fneg:
; AVX-FAST:       # %bb.0:
; AVX-FAST-NEXT:    vxorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; AVX-FAST-NEXT:    retq
;
; F16C-LABEL: test_fneg:
; F16C:       # %bb.0:
; F16C-NEXT:    vxorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; F16C-NEXT:    retq
;
; F16C-FAST-LABEL: test_fneg:
; F16C-FAST:       # %bb.0:
; F16C-FAST-NEXT:    vxorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; F16C-FAST-NEXT:    retq
  %ext = fpext half %a to float
  %neg = fneg float %ext
  %res = fptrunc float %neg to half
  ret half %res
}

define half @test_fabs(half %a) nounwind {
; SSE2-LABEL: test_fabs:
; SSE2:       # %bb.0:
; SSE2-NEXT:    andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-NEXT:    retq
;
; SSE2-FAST-LABEL: test_fabs:
; SSE2-FAST:       # %bb.0:
; SSE2-FAST-NEXT:    andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-FAST-NEXT:    retq
;
; AVX-LABEL: test_fabs:
; AVX:       # %bb.0:
; AVX-NEXT:    vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; AVX-NEXT:    retq
;
; AVX-FAST-LABEL: test_fabs:
; AVX-FAST:       # %bb.0:
; AVX-FAST-NEXT:    vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; AVX-FAST-NEXT:    retq
;
; F16C-LABEL: test_fabs:
; F16C:       # %bb.0:
; F16C-NEXT:    vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; F16C-NEXT:    retq
;
; F16C-FAST-LABEL: test_fabs:
; F16C-FAST:       # %bb.0:
; F16C-FAST-NEXT:    vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; F16C-FAST-NEXT:    retq
  %ext = fpext half %a to float
  %abs = call float @llvm.fabs.f32(float %ext)
  %res = fptrunc float %abs to half
  ret half %res
}