; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 ; RUN: opt < %s -msan-check-access-address=0 -S -passes=msan 2>&1 | FileCheck %s ; Test that code using va_start can be compiled on LoongArch. target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128" target triple = "loongarch64-unknown-linux-gnu" define void @VaStart(ptr %s, ...) { ; CHECK-LABEL: define void @VaStart( ; CHECK-SAME: ptr [[S:%.*]], ...) { ; CHECK-NEXT: [[ENTRY:.*:]] ; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_va_arg_overflow_size_tls, align 8 ; CHECK-NEXT: [[TMP2:%.*]] = alloca i8, i64 [[TMP1]], align 8 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP2]], i8 0, i64 [[TMP1]], i1 false) ; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 800) ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP2]], ptr align 8 @__msan_va_arg_tls, i64 [[TMP3]], i1 false) ; CHECK-NEXT: call void @llvm.donothing() ; CHECK-NEXT: [[VL:%.*]] = alloca ptr, align 4 ; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[VL]] to i64 ; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080 ; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP6]], i8 0, i64 8, i1 false) ; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[VL]] to i64 ; CHECK-NEXT: [[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080 ; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP9]], i8 0, i64 8, i1 false) ; CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VL]]) ; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[VL]] to i64 ; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr ; CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8 ; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[TMP12]] to i64 ; CHECK-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], 87960930222080 ; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP15]], ptr align 8 [[TMP2]], i64 [[TMP1]], i1 false) ; CHECK-NEXT: ret void ; entry: %vl = alloca ptr, align 4 call void @llvm.va_start(ptr %vl) ret void } declare void @llvm.va_start(ptr)