; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt < %s -passes=gvn -enable-scalar-pre -S | FileCheck %s --check-prefixes=CHECK,MDEP
; RUN: opt < %s -passes='gvn<memoryssa>' -enable-scalar-pre -S | FileCheck %s --check-prefixes=CHECK,MSSA

@H = common global i32 0
@G = common global i32 0

define i32 @test1(i1 %cond, i32 %v) nounwind {
; CHECK-LABEL: define i32 @test1(
; CHECK-SAME: i1 [[COND:%.*]], i32 [[V:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    br i1 [[COND]], label %[[BB:.*]], label %[[BB1:.*]]
; CHECK:       [[BB]]:
; CHECK-NEXT:    [[ADD_1:%.*]] = add i32 [[V]], 42
; CHECK-NEXT:    store i32 [[ADD_1]], ptr @G, align 4
; CHECK-NEXT:    br label %[[RETURN:.*]]
; CHECK:       [[BB1]]:
; CHECK-NEXT:    [[DOTPRE:%.*]] = add i32 [[V]], 42
; CHECK-NEXT:    br label %[[RETURN]]
; CHECK:       [[RETURN]]:
; CHECK-NEXT:    [[ADD_2_PRE_PHI:%.*]] = phi i32 [ [[DOTPRE]], %[[BB1]] ], [ [[ADD_1]], %[[BB]] ]
; CHECK-NEXT:    store i32 [[ADD_2_PRE_PHI]], ptr @H, align 4
; CHECK-NEXT:    ret i32 0
;
entry:
  br i1 %cond, label %bb, label %bb1

bb:
  %add.1 = add nuw nsw i32 %v, 42
  store i32 %add.1, ptr @G, align 4
  br label %return

bb1:
  br label %return

return:
  %add.2 = add i32 %v, 42
  store i32 %add.2, ptr @H, align 4
  ret i32 0
}

define i32 @test2(i1 %cond, i32 %v) nounwind {
; CHECK-LABEL: define i32 @test2(
; CHECK-SAME: i1 [[COND:%.*]], i32 [[V:%.*]]) #[[ATTR0]] {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    br i1 [[COND]], label %[[BB:.*]], label %[[BB1:.*]]
; CHECK:       [[BB]]:
; CHECK-NEXT:    [[ADD_1:%.*]] = add i32 [[V]], 42
; CHECK-NEXT:    store i32 [[ADD_1]], ptr @G, align 4
; CHECK-NEXT:    br label %[[RETURN:.*]]
; CHECK:       [[BB1]]:
; CHECK-NEXT:    [[DOTPRE:%.*]] = add nuw nsw i32 [[V]], 42
; CHECK-NEXT:    br label %[[RETURN]]
; CHECK:       [[RETURN]]:
; CHECK-NEXT:    [[ADD_2_PRE_PHI:%.*]] = phi i32 [ [[DOTPRE]], %[[BB1]] ], [ [[ADD_1]], %[[BB]] ]
; CHECK-NEXT:    store i32 [[ADD_2_PRE_PHI]], ptr @H, align 4
; CHECK-NEXT:    ret i32 0
;
entry:
  br i1 %cond, label %bb, label %bb1

bb:
  %add.1 = add i32 %v, 42
  store i32 %add.1, ptr @G, align 4
  br label %return

bb1:
  br label %return

return:
  %add.2 = add nuw nsw i32 %v, 42
  store i32 %add.2, ptr @H, align 4
  ret i32 0
}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; MDEP: {{.*}}
; MSSA: {{.*}}