; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -S -passes='require<domtree>,infer-address-spaces' %s | FileCheck %s

define void @test(ptr %lhs_ptr, ptr %rhs_ptr) {
; CHECK-LABEL: define void @test(
; CHECK-SAME: ptr [[LHS_PTR:%.*]], ptr [[RHS_PTR:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    [[PTR_1:%.*]] = load ptr, ptr [[LHS_PTR]], align 8
; CHECK-NEXT:    [[TMP0:%.*]] = addrspacecast ptr [[PTR_1]] to ptr addrspace(3)
; CHECK-NEXT:    [[BOOL_1:%.*]] = tail call i1 @llvm.amdgcn.is.shared(ptr [[PTR_1]])
; CHECK-NEXT:    tail call void @llvm.assume(i1 [[BOOL_1]])
; CHECK-NEXT:    [[PTR_2:%.*]] = load ptr, ptr [[RHS_PTR]], align 8
; CHECK-NEXT:    [[TMP1:%.*]] = addrspacecast ptr [[PTR_2]] to ptr addrspace(3)
; CHECK-NEXT:    [[BOOL_2:%.*]] = tail call i1 @llvm.amdgcn.is.shared(ptr [[PTR_2]])
; CHECK-NEXT:    tail call void @llvm.assume(i1 [[BOOL_2]])
; CHECK-NEXT:    br i1 poison, label %[[IF_THEN:.*]], label %[[IF_ELSE:.*]]
; CHECK:       [[IF_THEN]]:
; CHECK-NEXT:    [[V1:%.*]] = load i32, ptr null, align 4
; CHECK-NEXT:    br label %[[IF_SINK_SPLIT:.*]]
; CHECK:       [[IF_ELSE]]:
; CHECK-NEXT:    [[V2:%.*]] = load i32, ptr null, align 4
; CHECK-NEXT:    br label %[[IF_SINK_SPLIT]]
; CHECK:       [[IF_SINK_SPLIT]]:
; CHECK-NEXT:    [[PTR_SINK:%.*]] = phi ptr addrspace(3) [ [[TMP0]], %[[IF_THEN]] ], [ [[TMP1]], %[[IF_ELSE]] ]
; CHECK-NEXT:    [[V_SINK:%.*]] = phi i32 [ [[V1]], %[[IF_THEN]] ], [ [[V2]], %[[IF_ELSE]] ]
; CHECK-NEXT:    store i32 [[V_SINK]], ptr addrspace(3) [[PTR_SINK]], align 4
; CHECK-NEXT:    ret void
;
entry:
  %ptr.1 = load ptr, ptr %lhs_ptr, align 8
  %bool.1 = tail call i1 @llvm.amdgcn.is.shared(ptr %ptr.1)
  tail call void @llvm.assume(i1 %bool.1)

  %ptr.2 = load ptr, ptr %rhs_ptr, align 8
  %bool.2 = tail call i1 @llvm.amdgcn.is.shared(ptr %ptr.2)
  tail call void @llvm.assume(i1 %bool.2)
  br i1 poison, label %if.then, label %if.else

if.then:                                          ; preds = %entry
  %v1 = load i32, ptr null, align 4
  br label %if.sink.split

if.else:                                          ; preds = %entry
  %v2 = load i32, ptr null, align 4
  br label %if.sink.split

if.sink.split:                                    ; preds = %if.else, %if.then
  %ptr.sink = phi ptr [ %ptr.1, %if.then ], [ %ptr.2, %if.else ]
  %v.sink = phi i32 [ %v1, %if.then ], [ %v2, %if.else ]
  store i32 %v.sink, ptr %ptr.sink, align 4
  ret void
}

declare void @llvm.assume(i1 noundef)
declare i1 @llvm.amdgcn.is.shared(ptr)