; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -S -mtriple=nvptx64-nvidia-cuda -passes=infer-address-spaces %s | FileCheck %s

define void @test_smem_fail(ptr addrspace(3) %sp) {
; CHECK-LABEL: define void @test_smem_fail(
; CHECK-SAME: ptr addrspace(3) [[SP:%.*]]) {
; CHECK-NEXT:    [[GP:%.*]] = addrspacecast ptr addrspace(3) [[SP]] to ptr
; CHECK-NEXT:    [[A:%.*]] = ptrtoint ptr [[GP]] to i64
; CHECK-NEXT:    [[B:%.*]] = xor i64 4096, [[A]]
; CHECK-NEXT:    [[GP2:%.*]] = inttoptr i64 [[B]] to ptr
; CHECK-NEXT:    store i16 0, ptr [[GP2]], align 2
; CHECK-NEXT:    ret void
;
  %gp = addrspacecast ptr addrspace(3) %sp to ptr
  %a = ptrtoint ptr %gp to i64
  %b = xor i64 4096, %a
  %gp2 = inttoptr i64 %b to ptr
  store i16 0, ptr %gp2, align 2
  ret void
}

define void @test_smem_fail2(ptr addrspace(3) %sp) {
; CHECK-LABEL: define void @test_smem_fail2(
; CHECK-SAME: ptr addrspace(3) [[SP:%.*]]) {
; CHECK-NEXT:    [[GP1:%.*]] = addrspacecast ptr addrspace(3) [[SP]] to ptr
; CHECK-NEXT:    [[GP:%.*]] = getelementptr i8, ptr [[GP1]], i32 8
; CHECK-NEXT:    [[A:%.*]] = ptrtoint ptr [[GP]] to i64
; CHECK-NEXT:    [[B:%.*]] = xor i64 4095, [[A]]
; CHECK-NEXT:    [[GP2:%.*]] = inttoptr i64 [[B]] to ptr
; CHECK-NEXT:    store i16 0, ptr [[GP2]], align 2
; CHECK-NEXT:    ret void
;
  %gp1 = addrspacecast ptr addrspace(3) %sp to ptr
  %gp = getelementptr i8, ptr %gp1, i32 8
  %a = ptrtoint ptr %gp to i64
  %b = xor i64 4095, %a
  %gp2 = inttoptr i64 %b to ptr
  store i16 0, ptr %gp2, align 2
  ret void
}

define void @test_xor_smem(ptr addrspace(3) %sp) {
; CHECK-LABEL: define void @test_xor_smem(
; CHECK-SAME: ptr addrspace(3) [[SP:%.*]]) {
; CHECK-NEXT:    [[GP:%.*]] = addrspacecast ptr addrspace(3) [[SP]] to ptr
; CHECK-NEXT:    [[A:%.*]] = ptrtoint ptr [[GP]] to i64
; CHECK-NEXT:    [[B:%.*]] = xor i64 4095, [[A]]
; CHECK-NEXT:    [[GP2:%.*]] = inttoptr i64 [[B]] to ptr
; CHECK-NEXT:    [[TMP1:%.*]] = addrspacecast ptr [[GP2]] to ptr addrspace(3)
; CHECK-NEXT:    store i16 0, ptr addrspace(3) [[TMP1]], align 2
; CHECK-NEXT:    ret void
;
  %gp = addrspacecast ptr addrspace(3) %sp to ptr
  %a = ptrtoint ptr %gp to i64
  %b = xor i64 4095, %a
  %gp2 = inttoptr i64 %b to ptr
  store i16 0, ptr %gp2, align 2
  ret void
}

define void @test_xor_smem2(ptr addrspace(3) %sp) {
; CHECK-LABEL: define void @test_xor_smem2(
; CHECK-SAME: ptr addrspace(3) [[SP:%.*]]) {
; CHECK-NEXT:    [[GP:%.*]] = addrspacecast ptr addrspace(3) [[SP]] to ptr
; CHECK-NEXT:    [[A:%.*]] = ptrtoint ptr [[GP]] to i64
; CHECK-NEXT:    [[B:%.*]] = xor i64 [[A]], 4095
; CHECK-NEXT:    [[GP2:%.*]] = inttoptr i64 [[B]] to ptr
; CHECK-NEXT:    [[TMP1:%.*]] = addrspacecast ptr [[GP2]] to ptr addrspace(3)
; CHECK-NEXT:    store i16 0, ptr addrspace(3) [[TMP1]], align 2
; CHECK-NEXT:    ret void
;
  %gp = addrspacecast ptr addrspace(3) %sp to ptr
  %a = ptrtoint ptr %gp to i64
  %b = xor i64 %a, 4095
  %gp2 = inttoptr i64 %b to ptr
  store i16 0, ptr %gp2, align 2
  ret void
}

define void @test_or_smem(ptr addrspace(3) %sp) {
; CHECK-LABEL: define void @test_or_smem(
; CHECK-SAME: ptr addrspace(3) [[SP:%.*]]) {
; CHECK-NEXT:    [[GP:%.*]] = addrspacecast ptr addrspace(3) [[SP]] to ptr
; CHECK-NEXT:    [[A:%.*]] = ptrtoint ptr [[GP]] to i64
; CHECK-NEXT:    [[B:%.*]] = or i64 4095, [[A]]
; CHECK-NEXT:    [[GP2:%.*]] = inttoptr i64 [[B]] to ptr
; CHECK-NEXT:    [[TMP1:%.*]] = addrspacecast ptr [[GP2]] to ptr addrspace(3)
; CHECK-NEXT:    store i16 0, ptr addrspace(3) [[TMP1]], align 2
; CHECK-NEXT:    ret void
;
  %gp = addrspacecast ptr addrspace(3) %sp to ptr
  %a = ptrtoint ptr %gp to i64
  %b = or i64 4095, %a
  %gp2 = inttoptr i64 %b to ptr
  store i16 0, ptr %gp2, align 2
  ret void
}

define void @test_or_smem2(ptr addrspace(3) %sp) {
; CHECK-LABEL: define void @test_or_smem2(
; CHECK-SAME: ptr addrspace(3) [[SP:%.*]]) {
; CHECK-NEXT:    [[GP:%.*]] = addrspacecast ptr addrspace(3) [[SP]] to ptr
; CHECK-NEXT:    [[A:%.*]] = ptrtoint ptr [[GP]] to i64
; CHECK-NEXT:    [[B:%.*]] = or i64 4096, [[A]]
; CHECK-NEXT:    [[GP2:%.*]] = inttoptr i64 [[B]] to ptr
; CHECK-NEXT:    store i16 0, ptr [[GP2]], align 2
; CHECK-NEXT:    ret void
;
  %gp = addrspacecast ptr addrspace(3) %sp to ptr
  %a = ptrtoint ptr %gp to i64
  %b = or i64 4096, %a
  %gp2 = inttoptr i64 %b to ptr
  store i16 0, ptr %gp2, align 2
  ret void
}

define void @test_and_smem(ptr addrspace(3) %sp) {
; CHECK-LABEL: define void @test_and_smem(
; CHECK-SAME: ptr addrspace(3) [[SP:%.*]]) {
; CHECK-NEXT:    [[GP:%.*]] = addrspacecast ptr addrspace(3) [[SP]] to ptr
; CHECK-NEXT:    [[A:%.*]] = ptrtoint ptr [[GP]] to i64
; CHECK-NEXT:    [[B:%.*]] = and i64 [[A]], -4096
; CHECK-NEXT:    [[GP2:%.*]] = inttoptr i64 [[B]] to ptr
; CHECK-NEXT:    [[TMP1:%.*]] = addrspacecast ptr [[GP2]] to ptr addrspace(3)
; CHECK-NEXT:    store i16 0, ptr addrspace(3) [[TMP1]], align 2
; CHECK-NEXT:    ret void
;
  %gp = addrspacecast ptr addrspace(3) %sp to ptr
  %a = ptrtoint ptr %gp to i64
  %b = and i64 %a, -4096
  %gp2 = inttoptr i64 %b to ptr
  store i16 0, ptr %gp2, align 2
  ret void
}

define void @test_and_smem_fail(ptr addrspace(3) %sp) {
; CHECK-LABEL: define void @test_and_smem_fail(
; CHECK-SAME: ptr addrspace(3) [[SP:%.*]]) {
; CHECK-NEXT:    [[GP:%.*]] = addrspacecast ptr addrspace(3) [[SP]] to ptr
; CHECK-NEXT:    [[A:%.*]] = ptrtoint ptr [[GP]] to i64
; CHECK-NEXT:    [[B:%.*]] = and i64 [[A]], -4097
; CHECK-NEXT:    [[GP2:%.*]] = inttoptr i64 [[B]] to ptr
; CHECK-NEXT:    store i16 0, ptr [[GP2]], align 2
; CHECK-NEXT:    ret void
;
  %gp = addrspacecast ptr addrspace(3) %sp to ptr
  %a = ptrtoint ptr %gp to i64
  %b = and i64 %a, -4097
  %gp2 = inttoptr i64 %b to ptr
  store i16 0, ptr %gp2, align 2
  ret void
}

define void @test_gmem(ptr addrspace(1) %sp) {
; CHECK-LABEL: define void @test_gmem(
; CHECK-SAME: ptr addrspace(1) [[SP:%.*]]) {
; CHECK-NEXT:    [[GP:%.*]] = addrspacecast ptr addrspace(1) [[SP]] to ptr
; CHECK-NEXT:    [[A:%.*]] = ptrtoint ptr [[GP]] to i64
; CHECK-NEXT:    [[B:%.*]] = xor i64 7, [[A]]
; CHECK-NEXT:    [[GP2:%.*]] = inttoptr i64 [[B]] to ptr
; CHECK-NEXT:    [[TMP1:%.*]] = addrspacecast ptr [[GP2]] to ptr addrspace(1)
; CHECK-NEXT:    store i16 0, ptr addrspace(1) [[TMP1]], align 2
; CHECK-NEXT:    ret void
;
  %gp = addrspacecast ptr addrspace(1) %sp to ptr
  %a = ptrtoint ptr %gp to i64
  %b = xor i64 7, %a
  %gp2 = inttoptr i64 %b to ptr
  store i16 0, ptr %gp2, align 2
  ret void
}

define void @test_lmem(ptr addrspace(5) %sp) {
; CHECK-LABEL: define void @test_lmem(
; CHECK-SAME: ptr addrspace(5) [[SP:%.*]]) {
; CHECK-NEXT:    [[GP:%.*]] = addrspacecast ptr addrspace(5) [[SP]] to ptr
; CHECK-NEXT:    [[A:%.*]] = ptrtoint ptr [[GP]] to i64
; CHECK-NEXT:    [[B:%.*]] = xor i64 7, [[A]]
; CHECK-NEXT:    [[GP2:%.*]] = inttoptr i64 [[B]] to ptr
; CHECK-NEXT:    store i16 0, ptr [[GP2]], align 2
; CHECK-NEXT:    ret void
;
  %gp = addrspacecast ptr addrspace(5) %sp to ptr
  %a = ptrtoint ptr %gp to i64
  %b = xor i64 7, %a
  %gp2 = inttoptr i64 %b to ptr
  store i16 0, ptr %gp2, align 2
  ret void
}

define void @test3(ptr addrspace(3) %sp) {
; CHECK-LABEL: define void @test3(
; CHECK-SAME: ptr addrspace(3) [[SP:%.*]]) {
; CHECK-NEXT:    [[GP:%.*]] = addrspacecast ptr addrspace(3) [[SP]] to ptr
; CHECK-NEXT:    [[T1:%.*]] = ptrtoint ptr [[GP]] to i64
; CHECK-NEXT:    [[AND:%.*]] = lshr i64 [[T1]], 8
; CHECK-NEXT:    [[SHR:%.*]] = and i64 [[AND]], 8
; CHECK-NEXT:    [[AND1:%.*]] = lshr i64 [[T1]], 10
; CHECK-NEXT:    [[SHR2:%.*]] = and i64 [[AND1]], 4
; CHECK-NEXT:    [[OR:%.*]] = or i64 [[SHR]], [[SHR2]]
; CHECK-NEXT:    [[AND3:%.*]] = lshr i64 [[T1]], 4
; CHECK-NEXT:    [[SHR4:%.*]] = and i64 [[AND3]], 112
; CHECK-NEXT:    [[OR5:%.*]] = or i64 [[OR]], [[SHR4]]
; CHECK-NEXT:    [[XOR:%.*]] = xor i64 [[OR5]], [[T1]]
; CHECK-NEXT:    [[GP2:%.*]] = inttoptr i64 [[XOR]] to ptr
; CHECK-NEXT:    [[TMP1:%.*]] = addrspacecast ptr [[GP2]] to ptr addrspace(3)
; CHECK-NEXT:    store i16 0, ptr addrspace(3) [[TMP1]], align 2
; CHECK-NEXT:    ret void
;
  %gp = addrspacecast ptr addrspace(3) %sp to ptr
  %t1 = ptrtoint ptr %gp to i64
  %and = lshr i64 %t1, 8
  %shr = and i64 %and, 8
  %and1 = lshr i64 %t1, 10
  %shr2 = and i64 %and1, 4
  %or = or i64 %shr, %shr2
  %and3 = lshr i64 %t1, 4
  %shr4 = and i64 %and3, 112
  %or5 = or i64 %or, %shr4
  %xor = xor i64 %or5, %t1
  %gp2 = inttoptr i64 %xor to ptr
  store i16 0, ptr %gp2, align 2
  ret void
}

@g = addrspace(1) global i32 0, align 4

define void @test_ce() {
; CHECK-LABEL: define void @test_ce() {
; CHECK-NEXT:    store i32 0, ptr inttoptr (i64 xor (i64 ptrtoint (ptr addrspacecast (ptr addrspace(1) @g to ptr) to i64), i64 7) to ptr), align 4
; CHECK-NEXT:    ret void
;
  store i32 0, ptr inttoptr (i64
  xor (i64
  ptrtoint (ptr
  addrspacecast (ptr addrspace(1) @g to ptr)
  to i64),
  i64 7)
  to ptr)
  ret void
}