; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt < %s -S -passes=loop-interchange \
; RUN:       -loop-interchange-profitabilities=ignore | FileCheck %s

; This is a 3-level nested loop (i, j, k) with a reduction variable. The
; reduction variable involves the outer loop (i) and the middle loop (j), but
; not the innermost loop (k). Previously, the loop interchange pass crashed
; when trying to interchange the i-loop and the j-loop. This test ensures that
; the loop interchange pass can handle such a case.

define void @f() {
; CHECK-LABEL: define void @f() {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    br label %[[LOOP_J_HEADER_PREHEADER:.*]]
; CHECK:       [[LOOP_I_HEADER_PREHEADER:.*]]:
; CHECK-NEXT:    br label %[[LOOP_I_HEADER:.*]]
; CHECK:       [[LOOP_I_HEADER]]:
; CHECK-NEXT:    [[I:%.*]] = phi i64 [ [[I_INC:%.*]], %[[LOOP_I_LATCH:.*]] ], [ 0, %[[LOOP_I_HEADER_PREHEADER]] ]
; CHECK-NEXT:    [[RED_J:%.*]] = phi i8 [ [[RED_J_NEXT:%.*]], %[[LOOP_I_LATCH]] ], [ [[RED_I:%.*]], %[[LOOP_I_HEADER_PREHEADER]] ]
; CHECK-NEXT:    br label %[[LOOP_K:.*]]
; CHECK:       [[LOOP_J_HEADER_PREHEADER]]:
; CHECK-NEXT:    br label %[[LOOP_J_HEADER:.*]]
; CHECK:       [[LOOP_J_HEADER]]:
; CHECK-NEXT:    [[J:%.*]] = phi i64 [ [[TMP0:%.*]], %[[LOOP_J_LATCH_SPLIT:.*]] ], [ 0, %[[LOOP_J_HEADER_PREHEADER]] ]
; CHECK-NEXT:    [[RED_I]] = phi i8 [ [[RED_J_NEXT_LCSSA:%.*]], %[[LOOP_J_LATCH_SPLIT]] ], [ 0, %[[LOOP_J_HEADER_PREHEADER]] ]
; CHECK-NEXT:    br label %[[LOOP_I_HEADER_PREHEADER]]
; CHECK:       [[LOOP_K]]:
; CHECK-NEXT:    [[K:%.*]] = phi i64 [ 0, %[[LOOP_I_HEADER]] ], [ [[K_INC:%.*]], %[[LOOP_K]] ]
; CHECK-NEXT:    [[K_INC]] = add i64 [[K]], 1
; CHECK-NEXT:    [[EC_K:%.*]] = icmp eq i64 [[K_INC]], 10
; CHECK-NEXT:    br i1 [[EC_K]], label %[[LOOP_J_LATCH:.*]], label %[[LOOP_K]]
; CHECK:       [[LOOP_J_LATCH]]:
; CHECK-NEXT:    [[RED_J_NEXT]] = or i8 [[RED_J]], 42
; CHECK-NEXT:    [[J_INC:%.*]] = add i64 [[J]], 1
; CHECK-NEXT:    [[EC_J:%.*]] = icmp eq i64 [[J_INC]], 20
; CHECK-NEXT:    br label %[[LOOP_I_LATCH]]
; CHECK:       [[LOOP_J_LATCH_SPLIT]]:
; CHECK-NEXT:    [[RED_J_NEXT_LCSSA]] = phi i8 [ [[RED_J_NEXT]], %[[LOOP_I_LATCH]] ]
; CHECK-NEXT:    [[TMP0]] = add i64 [[J]], 1
; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i64 [[TMP0]], 20
; CHECK-NEXT:    br i1 [[TMP1]], label %[[EXIT:.*]], label %[[LOOP_J_HEADER]]
; CHECK:       [[LOOP_I_LATCH]]:
; CHECK-NEXT:    [[I_INC]] = add i64 [[I]], 1
; CHECK-NEXT:    [[EC_I:%.*]] = icmp eq i64 [[I_INC]], 30
; CHECK-NEXT:    br i1 [[EC_I]], label %[[LOOP_J_LATCH_SPLIT]], label %[[LOOP_I_HEADER]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    ret void
;
entry:
  br label %loop.i.header

loop.i.header:
  %i = phi i64 [ 0, %entry ], [ %i.inc, %loop.i.latch ]
  %red.i = phi i8 [ 0, %entry ], [ %red.j.next, %loop.i.latch ]
  br label %loop.j.header

loop.j.header:
  %j = phi i64 [ 0, %loop.i.header ], [ %j.inc, %loop.j.latch ]
  %red.j = phi i8 [ %red.i, %loop.i.header ], [ %red.j.next, %loop.j.latch ]
  br label %loop.k

loop.k:
  %k = phi i64 [ 0, %loop.j.header ], [ %k.inc, %loop.k ]
  %k.inc = add i64 %k, 1
  %ec.k = icmp eq i64 %k.inc, 10
  br i1 %ec.k, label %loop.j.latch, label %loop.k

loop.j.latch:
  %red.j.next = or i8 %red.j, 42
  %j.inc = add i64 %j, 1
  %ec.j = icmp eq i64 %j.inc, 20
  br i1 %ec.j, label %loop.i.latch, label %loop.j.header

loop.i.latch:
  %i.inc = add i64 %i, 1
  %ec.i = icmp eq i64 %i.inc, 30
  br i1 %ec.i, label %exit, label %loop.i.header

exit:
  ret void
}