# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=riscv64 -mcpu=spacemit-x60 -iterations=1 -instruction-tables=full %p/../Inputs/integer.s | FileCheck %s

# CHECK:      Resources:
# CHECK-NEXT: [0]   - SMX60_FP:1
# CHECK-NEXT: [1]   - SMX60_IEU:2 SMX60_IEUA, SMX60_IEUB
# CHECK-NEXT: [2]   - SMX60_IEUA:1
# CHECK-NEXT: [3]   - SMX60_IEUB:1
# CHECK-NEXT: [4]   - SMX60_LS:2
# CHECK-NEXT: [5]   - SMX60_VFP:1
# CHECK-NEXT: [6]   - SMX60_VIEU:1
# CHECK-NEXT: [7]   - SMX60_VLS:1

# CHECK:      Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)
# CHECK-NEXT: [7]: Bypass Latency
# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
# CHECK-NEXT: [9]: LLVM Opcode Name

# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]                                        [9]                        Instructions:
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  C_ADDI                     addi	a0, a0, 1
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  C_ADDIW                    addiw	a0, a0, 1
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  SLTI                       slti	a0, a0, 1
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  SLTIU                      seqz	a0, a0
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  C_ANDI                     andi	a0, a0, 1
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  ORI                        ori	a0, a0, 1
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  XORI                       xori	a0, a0, 1
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  C_SLLI                     slli	a0, a0, 1
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  C_SRLI                     srli	a0, a0, 1
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  C_SRAI                     srai	a0, a0, 1
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  SLLIW                      slliw	a0, a0, 1
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  SRLIW                      srliw	a0, a0, 1
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  SRAIW                      sraiw	a0, a0, 1
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  C_LUI                      lui	a0, 1
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  AUIPC                      auipc	a1, 1
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  C_ADD                      add	a0, a0, a1
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  C_ADDW                     addw	a0, a0, a0
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  SLT                        slt	a0, a0, a0
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  SLTU                       sltu	a0, a0, a0
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  C_AND                      and	a0, a0, a0
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  C_OR                       or	a0, a0, a0
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  C_XOR                      xor	a0, a0, a0
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  SLL                        sll	a0, a0, a0
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  SRL                        srl	a0, a0, a0
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  SRA                        sra	a0, a0, a0
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  SLLW                       sllw	a0, a0, a0
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  SRLW                       srlw	a0, a0, a0
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  SRAW                       sraw	a0, a0, a0
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  C_SUB                      sub	a0, a0, a0
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  C_SUBW                     subw	a0, a0, a0
# CHECK-NEXT:  1      1     1.00                         1     SMX60_IEU,SMX60_IEUA                       JAL                        jal	a0, .Ltmp0
# CHECK-NEXT:  1      1     1.00                         1     SMX60_IEU,SMX60_IEUA                       C_JALR                     jalr	a0
# CHECK-NEXT:  1      1     1.00                         1     SMX60_IEU,SMX60_IEUA                       BEQ                        beq	a0, a0, .Ltmp1
# CHECK-NEXT:  1      1     1.00                         1     SMX60_IEU,SMX60_IEUA                       BNE                        bne	a0, a0, .Ltmp2
# CHECK-NEXT:  1      1     1.00                         1     SMX60_IEU,SMX60_IEUA                       BLT                        blt	a0, a0, .Ltmp3
# CHECK-NEXT:  1      1     1.00                         1     SMX60_IEU,SMX60_IEUA                       BLTU                       bltu	a0, a0, .Ltmp4
# CHECK-NEXT:  1      1     1.00                         1     SMX60_IEU,SMX60_IEUA                       BGE                        bge	a0, a0, .Ltmp5
# CHECK-NEXT:  1      1     1.00                         1     SMX60_IEU,SMX60_IEUA                       BGEU                       bgeu	a0, a0, .Ltmp6
# CHECK-NEXT:  1      1     0.50                         1     SMX60_IEU                                  C_ADD                      add	a0, a0, a0
# CHECK-NEXT:  1      4     0.50    *                    4     SMX60_LS                                   LB                         lb	t0, 0(a0)
# CHECK-NEXT:  1      4     0.50    *                    4     SMX60_LS                                   LBU                        lbu	t0, 0(a0)
# CHECK-NEXT:  1      4     0.50    *                    4     SMX60_LS                                   LH                         lh	t0, 0(a0)
# CHECK-NEXT:  1      4     0.50    *                    4     SMX60_LS                                   LHU                        lhu	t0, 0(a0)
# CHECK-NEXT:  1      4     0.50    *                    4     SMX60_LS                                   LW                         lw	t0, 0(a0)
# CHECK-NEXT:  1      4     0.50    *                    4     SMX60_LS                                   LWU                        lwu	t0, 0(a0)
# CHECK-NEXT:  1      4     0.50    *                    4     SMX60_LS                                   LD                         ld	t0, 0(a0)
# CHECK-NEXT:  1      4     0.50           *             4     SMX60_LS                                   SB                         sb	t0, 0(a0)
# CHECK-NEXT:  1      4     0.50           *             4     SMX60_LS                                   SH                         sh	t0, 0(a0)
# CHECK-NEXT:  1      4     0.50           *             4     SMX60_LS                                   SW                         sw	t0, 0(a0)
# CHECK-NEXT:  1      4     0.50           *             4     SMX60_LS                                   SD                         sd	t0, 0(a0)
# CHECK-NEXT:  1      1     0.50                  U      1     SMX60_IEU                                  CSRRW                      csrrw	t0, 4095, t1
# CHECK-NEXT:  1      1     0.50                  U      1     SMX60_IEU                                  CSRRS                      csrrs	s3, fflags, s5
# CHECK-NEXT:  1      1     0.50                  U      1     SMX60_IEU                                  CSRRC                      csrrc	sp, 0, ra
# CHECK-NEXT:  1      1     0.50                  U      1     SMX60_IEU                                  CSRRWI                     csrrwi	a5, 0, 0
# CHECK-NEXT:  1      1     0.50                  U      1     SMX60_IEU                                  CSRRSI                     csrrsi	t2, 4095, 31
# CHECK-NEXT:  1      1     0.50                  U      1     SMX60_IEU                                  CSRRCI                     csrrci	t1, sscratch, 5

# CHECK:      Resources:
# CHECK-NEXT: [0]   - SMX60_FP
# CHECK-NEXT: [1]   - SMX60_IEUA
# CHECK-NEXT: [2]   - SMX60_IEUB
# CHECK-NEXT: [3.0] - SMX60_LS
# CHECK-NEXT: [3.1] - SMX60_LS
# CHECK-NEXT: [4]   - SMX60_VFP
# CHECK-NEXT: [5]   - SMX60_VIEU
# CHECK-NEXT: [6]   - SMX60_VLS

# CHECK:      Resource pressure per iteration:
# CHECK-NEXT: [0]    [1]    [2]    [3.0]  [3.1]  [4]    [5]    [6]
# CHECK-NEXT:  -     26.50  18.50  5.50   5.50    -      -      -

# CHECK:      Resource pressure by instruction:
# CHECK-NEXT: [0]    [1]    [2]    [3.0]  [3.1]  [4]    [5]    [6]    Instructions:
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     addi	a0, a0, 1
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     addiw	a0, a0, 1
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     slti	a0, a0, 1
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     seqz	a0, a0
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     andi	a0, a0, 1
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     ori	a0, a0, 1
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     xori	a0, a0, 1
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     slli	a0, a0, 1
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     srli	a0, a0, 1
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     srai	a0, a0, 1
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     slliw	a0, a0, 1
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     srliw	a0, a0, 1
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sraiw	a0, a0, 1
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     lui	a0, 1
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     auipc	a1, 1
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     add	a0, a0, a1
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     addw	a0, a0, a0
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     slt	a0, a0, a0
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sltu	a0, a0, a0
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     and	a0, a0, a0
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     or	a0, a0, a0
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     xor	a0, a0, a0
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sll	a0, a0, a0
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     srl	a0, a0, a0
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sra	a0, a0, a0
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sllw	a0, a0, a0
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     srlw	a0, a0, a0
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sraw	a0, a0, a0
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sub	a0, a0, a0
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     subw	a0, a0, a0
# CHECK-NEXT:  -     1.00    -      -      -      -      -      -     jal	a0, .Ltmp0
# CHECK-NEXT:  -     1.00    -      -      -      -      -      -     jalr	a0
# CHECK-NEXT:  -     1.00    -      -      -      -      -      -     beq	a0, a0, .Ltmp1
# CHECK-NEXT:  -     1.00    -      -      -      -      -      -     bne	a0, a0, .Ltmp2
# CHECK-NEXT:  -     1.00    -      -      -      -      -      -     blt	a0, a0, .Ltmp3
# CHECK-NEXT:  -     1.00    -      -      -      -      -      -     bltu	a0, a0, .Ltmp4
# CHECK-NEXT:  -     1.00    -      -      -      -      -      -     bge	a0, a0, .Ltmp5
# CHECK-NEXT:  -     1.00    -      -      -      -      -      -     bgeu	a0, a0, .Ltmp6
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     add	a0, a0, a0
# CHECK-NEXT:  -      -      -     0.50   0.50    -      -      -     lb	t0, 0(a0)
# CHECK-NEXT:  -      -      -     0.50   0.50    -      -      -     lbu	t0, 0(a0)
# CHECK-NEXT:  -      -      -     0.50   0.50    -      -      -     lh	t0, 0(a0)
# CHECK-NEXT:  -      -      -     0.50   0.50    -      -      -     lhu	t0, 0(a0)
# CHECK-NEXT:  -      -      -     0.50   0.50    -      -      -     lw	t0, 0(a0)
# CHECK-NEXT:  -      -      -     0.50   0.50    -      -      -     lwu	t0, 0(a0)
# CHECK-NEXT:  -      -      -     0.50   0.50    -      -      -     ld	t0, 0(a0)
# CHECK-NEXT:  -      -      -     0.50   0.50    -      -      -     sb	t0, 0(a0)
# CHECK-NEXT:  -      -      -     0.50   0.50    -      -      -     sh	t0, 0(a0)
# CHECK-NEXT:  -      -      -     0.50   0.50    -      -      -     sw	t0, 0(a0)
# CHECK-NEXT:  -      -      -     0.50   0.50    -      -      -     sd	t0, 0(a0)
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     csrrw	t0, 4095, t1
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     csrrs	s3, fflags, s5
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     csrrc	sp, 0, ra
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     csrrwi	a5, 0, 0
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     csrrsi	t2, 4095, 31
# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     csrrci	t1, sscratch, 5