---
include: hipblas_common.yaml

Definitions:
  - &size_range
    - { N: -1, lda: -1 }
    - { N: 100, lda: 200 }

  - &incx_incy_range
    - { incx:  -2, incy:  1 }

  - &alpha_beta_range
    - { alpha:  2.0, beta:  2.0 }

  - &batch_count_range
    - [ -1, 5 ]

Tests:
  - name: hemv_general
    category: quick
    function: hemv
    precision: *single_double_precisions_complex
    uplo: [ 'L', 'U' ]
    alpha_beta: *alpha_beta_range
    matrix_size: *size_range
    incx_incy: *incx_incy_range
    api: [ FORTRAN, C, FORTRAN_64, C_64 ]

  - name: hemv_batched_general
    category: quick
    function: hemv_batched
    precision: *single_double_precisions_complex
    uplo: [ 'L', 'U' ]
    alpha_beta: *alpha_beta_range
    matrix_size: *size_range
    incx_incy: *incx_incy_range
    batch_count: *batch_count_range
    api: [ FORTRAN, C, FORTRAN_64, C_64 ]
    backend_flags: AMD

  - name: hemv_strided_batched_general
    category: quick
    function: hemv_strided_batched
    precision: *single_double_precisions_complex
    uplo: [ 'L', 'U' ]
    alpha_beta: *alpha_beta_range
    matrix_size: *size_range
    incx_incy: *incx_incy_range
    batch_count: *batch_count_range
    stride_scale: [ 2.5 ]
    api: [ FORTRAN, C, FORTRAN_64, C_64 ]
    backend_flags: AMD

  - name: hemv_bad_arg
    category: pre_checkin
    function:
      - hemv_bad_arg
    precision: *single_double_precisions_complex
    api: [ FORTRAN, C, FORTRAN_64, C_64 ]
    backend_flags: AMD

  - name: hemv_bad_arg
    category: pre_checkin
    function:
      - hemv_bad_arg
    precision: *single_double_precisions_complex
    api: [ FORTRAN, C, FORTRAN_64, C_64 ]
    bad_arg_all: false
    backend_flags: NVIDIA

  - name: hemv_bad_arg
    category: pre_checkin
    function:
      - hemv_batched_bad_arg
      - hemv_strided_batched_bad_arg
    precision: *single_double_precisions_complex
    api: [ FORTRAN, C, FORTRAN_64, C_64 ]
    backend_flags: AMD
...