# ########################################################################
# Copyright (C) 2025-2026 Advanced Micro Devices, Inc. All rights Reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
# in the Software without restriction, including without limitation the rights
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
# copies of the Software, and to permit persons to whom the Software is
# furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
# THE SOFTWARE.
#
# ########################################################################

---
include: hipsparse_common.yaml


Tests:
- name: sddmm_csr_bad_arg
  category: pre_checkin
  function: sddmm_csr_bad_arg
  indextype: *i32i32_i64i32_i64i64
  precision: *single_double_precisions_complex_real

- name: sddmm_csr
  category: quick
  function: sddmm_csr
  indextype: *i32i32_i64i32_i64i64
  precision: *single_double_precisions_complex_real
  M: [50]
  N: [84]
  K: [5]
  alpha: [2.0]
  alphai: [0.0]
  beta: [1.0]
  betai: [0.0]
  transA: [HIPSPARSE_OPERATION_NON_TRANSPOSE, HIPSPARSE_OPERATION_TRANSPOSE]
  transB: [HIPSPARSE_OPERATION_NON_TRANSPOSE, HIPSPARSE_OPERATION_TRANSPOSE]
  orderA: [HIPSPARSE_ORDER_COL, HIPSPARSE_ORDER_ROW]
  orderB: [HIPSPARSE_ORDER_COL, HIPSPARSE_ORDER_ROW]
  baseC: [HIPSPARSE_INDEX_BASE_ZERO, HIPSPARSE_INDEX_BASE_ONE]
  sddmm_alg: [HIPSPARSE_SDDMM_ALG_DEFAULT]

- name: sddmm_csr
  category: pre_checkin
  function: sddmm_csr
  indextype: *i32i32_i64i32_i64i64
  precision: *single_double_precisions
  M: 1
  N: 1
  K: [5]
  alpha: [2.0]
  alphai: [0.0]
  beta: [1.0]
  betai: [0.0]
  transA: [HIPSPARSE_OPERATION_NON_TRANSPOSE, HIPSPARSE_OPERATION_TRANSPOSE]
  transB: [HIPSPARSE_OPERATION_NON_TRANSPOSE, HIPSPARSE_OPERATION_TRANSPOSE]
  orderA: [HIPSPARSE_ORDER_COL, HIPSPARSE_ORDER_ROW]
  orderB: [HIPSPARSE_ORDER_COL, HIPSPARSE_ORDER_ROW]
  baseC: [HIPSPARSE_INDEX_BASE_ZERO, HIPSPARSE_INDEX_BASE_ONE]
  sddmm_alg: [HIPSPARSE_SDDMM_ALG_DEFAULT]
  filename: [nos1,
             nos2,
             nos3,
             nos4,
             nos5,
             nos6,
             nos7]

- name: sddmm_csr
  category: nightly
  function: sddmm_csr
  indextype: *i64
  precision: *double_only_precisions
  M: 1
  N: 1
  K: [4]
  alpha: [2.0]
  alphai: [0.0]
  beta: [1.0]
  betai: [0.0]
  transA: [HIPSPARSE_OPERATION_NON_TRANSPOSE, HIPSPARSE_OPERATION_TRANSPOSE]
  transB: [HIPSPARSE_OPERATION_NON_TRANSPOSE, HIPSPARSE_OPERATION_TRANSPOSE]
  orderA: [HIPSPARSE_ORDER_COL, HIPSPARSE_ORDER_ROW]
  orderB: [HIPSPARSE_ORDER_COL, HIPSPARSE_ORDER_ROW]
  baseC: [HIPSPARSE_INDEX_BASE_ONE]
  sddmm_alg: [HIPSPARSE_SDDMM_ALG_DEFAULT]
  filename: [shipsec1]

- name: sddmm_csr
  category: pre_checkin
  function: sddmm_csr
  indextype: *i64
  precision: *double_only_precisions
  M: 1
  N: 1
  K: [8]
  alpha: [1.0]
  alphai: [1.0]
  beta: [1.0]
  betai: [1.0]
  transA: [HIPSPARSE_OPERATION_NON_TRANSPOSE]
  transB: [HIPSPARSE_OPERATION_NON_TRANSPOSE]
  orderA: [HIPSPARSE_ORDER_ROW]
  orderB: [HIPSPARSE_ORDER_ROW]
  baseC: [HIPSPARSE_INDEX_BASE_ONE]
  sddmm_alg: [HIPSPARSE_SDDMM_ALG_DEFAULT]
  filename: [bmwcra_1]
  graph_test: true