# ######################################################################## # Copyright (C) 2020-2024 Advanced Micro Devices, Inc. All rights Reserved. # # Permission is hereby granted, free of charge, to any person obtaining a copy # of this software and associated documentation files (the "Software"), to deal # in the Software without restriction, including without limitation the rights # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell # copies of the Software, and to permit persons to whom the Software is # furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice shall be included in # all copies or substantial portions of the Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN # THE SOFTWARE. # # ######################################################################## --- include: rocsparse_common.yaml Definitions: - &M_N_range_quick - { M: 50, N: 50 } - &M_N_range_checkin - { M: 0, N: 0 } - &M_N_range_nightly - { M: 9381, N: 9381 } - { M: 37017, N: 37017 } - &alpha_range_quick - { alpha: 1.0, alphai: -0.25 } - &alpha_range_checkin - { alpha: 2.0, alphai: 1.0 } - &alpha_range_nightly - { alpha: 0.0, alphai: -0.75 } - { alpha: -0.75, alphai: 0.25 } - &alpha_range - { alpha: 2.0, alphai: 1.0 } Tests: - name: bsrsv_bad_arg category: pre_checkin function: bsrsv_bad_arg precision: *single_double_precisions_complex_real - name: bsrsv category: pre_checkin function: bsrsv precision: *single_double_precisions_complex_real M_N: *M_N_range_checkin block_dim: [5] alpha_alphai: *alpha_range_checkin direction: [rocsparse_direction_column] transA: [rocsparse_operation_none] diag: [rocsparse_diag_type_non_unit] uplo: [rocsparse_fill_mode_lower] apol: [rocsparse_analysis_policy_reuse] spol: [rocsparse_solve_policy_auto] baseA: [rocsparse_index_base_zero] matrix: [rocsparse_matrix_random] - name: bsrsv_file category: pre_checkin function: bsrsv precision: *single_double_precisions_complex M: 1 N: 1 block_dim: [7] alpha_alphai: *alpha_range direction: [rocsparse_direction_row] transA: [rocsparse_operation_none] diag: [rocsparse_diag_type_non_unit] uplo: [rocsparse_fill_mode_lower] apol: [rocsparse_analysis_policy_force] spol: [rocsparse_solve_policy_auto] baseA: [rocsparse_index_base_one] matrix: [rocsparse_matrix_file_rocalution] filename: [mplate] - name: bsrsv_file category: pre_checkin function: bsrsv precision: *single_double_precisions M: 1 N: 1 block_dim: [6] alpha_alphai: *alpha_range_checkin direction: [rocsparse_direction_column] transA: [rocsparse_operation_transpose] diag: [rocsparse_diag_type_non_unit] uplo: [rocsparse_fill_mode_lower] apol: [rocsparse_analysis_policy_reuse] spol: [rocsparse_solve_policy_auto] baseA: [rocsparse_index_base_zero] matrix: [rocsparse_matrix_file_rocalution] filename: [nos3, nos7, scircuit] - name: bsrsv category: quick function: bsrsv precision: *single_double_precisions M_N: *M_N_range_quick block_dim: [9] alpha_alphai: *alpha_range_quick direction: [rocsparse_direction_row] transA: [rocsparse_operation_none] diag: [rocsparse_diag_type_non_unit] uplo: [rocsparse_fill_mode_lower] apol: [rocsparse_analysis_policy_reuse] spol: [rocsparse_solve_policy_auto] baseA: [rocsparse_index_base_zero] matrix: [rocsparse_matrix_random] - name: bsrsv category: quick function: bsrsv precision: *single_double_precisions M_N: *M_N_range_quick block_dim: [174] alpha_alphai: *alpha_range_quick direction: [rocsparse_direction_row] transA: [rocsparse_operation_none] diag: [rocsparse_diag_type_non_unit] uplo: [rocsparse_fill_mode_lower] apol: [rocsparse_analysis_policy_reuse] spol: [rocsparse_solve_policy_auto] baseA: [rocsparse_index_base_zero] matrix: [rocsparse_matrix_zero] - name: bsrsv_file category: quick function: bsrsv precision: *single_double_precisions M: 1 N: 1 block_dim: [16] alpha_alphai: *alpha_range_quick direction: [rocsparse_direction_column] transA: [rocsparse_operation_none] diag: [rocsparse_diag_type_non_unit] uplo: [rocsparse_fill_mode_lower] apol: [rocsparse_analysis_policy_force] spol: [rocsparse_solve_policy_auto] baseA: [rocsparse_index_base_one] matrix: [rocsparse_matrix_file_rocalution] filename: [nos1, nos2, nos4, nos6] - name: bsrsv_file category: quick function: bsrsv precision: *single_only_precisions_complex M: 1 N: 1 block_dim: [10] alpha_alphai: *alpha_range_quick direction: [rocsparse_direction_row] transA: [rocsparse_operation_transpose] diag: [rocsparse_diag_type_non_unit] uplo: [rocsparse_fill_mode_upper] apol: [rocsparse_analysis_policy_reuse] spol: [rocsparse_solve_policy_auto] baseA: [rocsparse_index_base_one] matrix: [rocsparse_matrix_file_rocalution] filename: [Chevron2] - name: bsrsv category: nightly function: bsrsv precision: *single_double_precisions_complex_real M_N: *M_N_range_nightly block_dim: [4, 11, 20] alpha_alphai: *alpha_range_nightly direction: [rocsparse_direction_row] transA: [rocsparse_operation_none] diag: [rocsparse_diag_type_non_unit] uplo: [rocsparse_fill_mode_lower] apol: [rocsparse_analysis_policy_reuse] spol: [rocsparse_solve_policy_auto] baseA: [rocsparse_index_base_one] matrix: [rocsparse_matrix_random] - name: bsrsv_file category: nightly function: bsrsv precision: *single_double_precisions M: 1 N: 1 block_dim: [2, 12] alpha_alphai: *alpha_range_nightly direction: [rocsparse_direction_row] transA: [rocsparse_operation_transpose] diag: [rocsparse_diag_type_non_unit] uplo: [rocsparse_fill_mode_lower] apol: [rocsparse_analysis_policy_force] spol: [rocsparse_solve_policy_auto] baseA: [rocsparse_index_base_zero] matrix: [rocsparse_matrix_file_rocalution] filename: [bmwcra_1, sme3Dc, shipsec1] - name: bsrsv_file category: nightly function: bsrsv precision: *single_double_precisions M: 1 N: 1 block_dim: [7] alpha_alphai: *alpha_range_nightly direction: [rocsparse_direction_column] transA: [rocsparse_operation_none] diag: [rocsparse_diag_type_unit] uplo: [rocsparse_fill_mode_upper] apol: [rocsparse_analysis_policy_reuse] spol: [rocsparse_solve_policy_auto] baseA: [rocsparse_index_base_zero] matrix: [rocsparse_matrix_file_rocalution] filename: [amazon0312, ASIC_320k] - name: bsrsv_file category: nightly function: bsrsv precision: *single_double_precisions_complex M: 1 N: 1 block_dim: [7] alpha_alphai: *alpha_range_nightly direction: [rocsparse_direction_column] transA: [rocsparse_operation_none] diag: [rocsparse_diag_type_unit] uplo: [rocsparse_fill_mode_upper] apol: [rocsparse_analysis_policy_reuse] spol: [rocsparse_solve_policy_auto] baseA: [rocsparse_index_base_zero] matrix: [rocsparse_matrix_file_rocalution] filename: [Chevron4] - name: bsrsv_graph_test category: pre_checkin function: bsrsv precision: *single_double_precisions_complex_real M_N: *M_N_range_quick block_dim: [2, 9, 16, 33, 174] alpha_alphai: *alpha_range_quick direction: [rocsparse_direction_row] transA: [rocsparse_operation_none] diag: [rocsparse_diag_type_non_unit] uplo: [rocsparse_fill_mode_lower] apol: [rocsparse_analysis_policy_reuse] spol: [rocsparse_solve_policy_auto] baseA: [rocsparse_index_base_zero] matrix: [rocsparse_matrix_random] graph_test: true