# ######################################################################## # Copyright (C) 2026 Advanced Micro Devices, Inc. All rights Reserved. # # Permission is hereby granted, free of charge, to any person obtaining a copy # of this software and associated documentation files (the "Software"), to deal # in the Software without restriction, including without limitation the rights # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell # copies of the Software, and to permit persons to whom the Software is # furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice shall be included in # all copies or substantial portions of the Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN # THE SOFTWARE. # # ######################################################################## --- include: rocsparse_common.yaml Definitions: - &M_N_range_quick - { M: 50, N: 50 } - { M: 187, N: 187 } - &M_N_range_checkin - { M: 79, N: 79 } - { M: 428, N: 428 } - &M_N_range_nightly - { M: 9381, N: 9381 } - { M: 37017, N: 37017 } - { M: 505194, N: 505194 } - &M_N_range_extra - { M: 10, N: 10 } - { M: 235, N: 235 } - { M: 600, N: 600 } - { M: 1200, N: 1200 } Tests: - name: spildlt0_bad_arg category: pre_checkin function: spildlt0_bad_arg precision: *single_double_precisions_complex_real formatA: [rocsparse_format_csr] indextype: *i32 - name: spildlt0_extra category: pre_checkin M_N: *M_N_range_extra apol: [rocsparse_analysis_policy_reuse, rocsparse_analysis_policy_force] baseA: [rocsparse_index_base_zero, rocsparse_index_base_one] formatA: [rocsparse_format_csr] function: spildlt0_extra indextype: *i32 batch_count: [1] - name: spildlt0 category: quick function: spildlt0 precision: *single_double_precisions_complex_real M_N: *M_N_range_quick apol: [rocsparse_analysis_policy_reuse, rocsparse_analysis_policy_force] baseA: [rocsparse_index_base_zero, rocsparse_index_base_one] formatA: [rocsparse_format_csr] matrix: [rocsparse_matrix_zero] indextype: *i32 batch_count: [1] - name: spildlt0 category: quick function: spildlt0 precision: *single_double_precisions_complex_real M_N: *M_N_range_quick apol: [rocsparse_analysis_policy_reuse, rocsparse_analysis_policy_force] baseA: [rocsparse_index_base_zero, rocsparse_index_base_one] formatA: [rocsparse_format_csr] matrix: [rocsparse_matrix_random] indextype: *i32 batch_count: [1, 2] - name: spildlt0 category: quick function: spildlt0 precision: *single_double_precisions_complex_real M_N: *M_N_range_quick apol: [rocsparse_analysis_policy_reuse] baseA: [rocsparse_index_base_zero, rocsparse_index_base_one] formatA: [rocsparse_format_csr] matrix: [rocsparse_matrix_random] indextype: *i32 batch_count: [3, 4] - name: spildlt0 category: quick function: spildlt0 precision: *single_double_precisions_complex_real M_N: *M_N_range_quick numericboost: [0, 1] boosttol: [0.05, 0.5] boostval: [1.0] apol: [rocsparse_analysis_policy_reuse] baseA: [rocsparse_index_base_zero] formatA: [rocsparse_format_csr] matrix: [rocsparse_matrix_random] indextype: *i32 batch_count: [1] - name: spildlt0 category: pre_checkin function: spildlt0 precision: *double_only_precisions_complex M_N: - { M: 79, N: 79 } apol: [rocsparse_analysis_policy_reuse, rocsparse_analysis_policy_force] baseA: [rocsparse_index_base_zero, rocsparse_index_base_one] formatA: [rocsparse_format_csr] matrix: [rocsparse_matrix_random] indextype: *i32 batch_count: [1] - name: spildlt0 category: pre_checkin function: spildlt0 precision: *double_only_precisions_complex_real M_N: - { M: 79, N: 79 } numericboost: [0, 1] boosttol: [0.05] boostval: [1.0] apol: [rocsparse_analysis_policy_reuse] baseA: [rocsparse_index_base_zero] formatA: [rocsparse_format_csr] matrix: [rocsparse_matrix_random] indextype: *i32 batch_count: [1] - name: spildlt0 category: nightly function: spildlt0 precision: *single_double_precisions_complex_real M_N: *M_N_range_nightly apol: [rocsparse_analysis_policy_reuse, rocsparse_analysis_policy_force] baseA: [rocsparse_index_base_zero, rocsparse_index_base_one] formatA: [rocsparse_format_csr] matrix: [rocsparse_matrix_random] indextype: *i32 batch_count: [1] - name: spildlt0_file category: quick function: spildlt0 precision: *single_double_precisions M: 1 N: 1 apol: [rocsparse_analysis_policy_reuse, rocsparse_analysis_policy_force] baseA: [rocsparse_index_base_zero, rocsparse_index_base_one] formatA: [rocsparse_format_csr] matrix: [rocsparse_matrix_file_rocalution] filename: [nos1, nos4, nos6, scircuit] indextype: *i32 - name: spildlt0_file category: pre_checkin function: spildlt0 precision: *double_precision M: 1 N: 1 apol: [rocsparse_analysis_policy_reuse, rocsparse_analysis_policy_force] baseA: [rocsparse_index_base_zero, rocsparse_index_base_one] formatA: [rocsparse_format_csr] matrix: [rocsparse_matrix_file_rocalution] filename: [mc2depi, nos1, nos2, nos3] indextype: *i32 - name: spildlt0_file category: nightly function: spildlt0 precision: *single_double_precisions M: 1 N: 1 apol: [rocsparse_analysis_policy_reuse, rocsparse_analysis_policy_force] baseA: [rocsparse_index_base_zero, rocsparse_index_base_one] formatA: [rocsparse_format_csr] matrix: [rocsparse_matrix_file_rocalution] filename: [amazon0312, nos3, nos5, nos7] indextype: *i32 - name: spildlt0_file category: nightly function: spildlt0 precision: *single_double_precisions M: 1 N: 1 apol: [rocsparse_analysis_policy_reuse, rocsparse_analysis_policy_force] baseA: [rocsparse_index_base_zero, rocsparse_index_base_one] formatA: [rocsparse_format_csr] matrix: [rocsparse_matrix_file_rocalution] filename: [Chebyshev4] skip_hardware: gfx940, gfx941 indextype: *i32 - name: spildlt0_file category: quick function: spildlt0 precision: *single_double_precisions_complex M: 1 N: 1 apol: [rocsparse_analysis_policy_reuse, rocsparse_analysis_policy_force] baseA: [rocsparse_index_base_zero, rocsparse_index_base_one] formatA: [rocsparse_format_csr] matrix: [rocsparse_matrix_file_rocalution] filename: [Chevron2] indextype: *i32 - name: spildlt0_file category: pre_checkin function: spildlt0 precision: *single_double_precisions_complex M: 1 N: 1 apol: [rocsparse_analysis_policy_reuse, rocsparse_analysis_policy_force] baseA: [rocsparse_index_base_zero, rocsparse_index_base_one] formatA: [rocsparse_format_csr] matrix: [rocsparse_matrix_file_rocalution] filename: [Chevron3] indextype: *i32 - name: spildlt0_file category: nightly function: spildlt0 precision: *single_double_precisions_complex M: 1 N: 1 apol: [rocsparse_analysis_policy_reuse, rocsparse_analysis_policy_force] baseA: [rocsparse_index_base_zero, rocsparse_index_base_one] formatA: [rocsparse_format_csr] matrix: [rocsparse_matrix_file_rocalution] filename: [Chevron4] indextype: *i32 - name: spildlt0_graph_test category: pre_checkin function: spildlt0 precision: *single_double_precisions_complex_real M_N: *M_N_range_quick apol: [rocsparse_analysis_policy_reuse, rocsparse_analysis_policy_force] baseA: [rocsparse_index_base_zero, rocsparse_index_base_one] formatA: [rocsparse_format_csr] matrix: [rocsparse_matrix_random] graph_test: true indextype: *i32 - name: spildlt0_extra category: pre_checkin function: spildlt0_extra - name: spildlt0_file category: stress function: spildlt0 precision: *single_double_precisions M: 1 N: 1 apol: [rocsparse_analysis_policy_reuse, rocsparse_analysis_policy_force] baseA: [rocsparse_index_base_zero, rocsparse_index_base_one] formatA: [rocsparse_format_csr] matrix: [rocsparse_matrix_file_rocalution] filename: [ASIC_320k] skip_hardware: gfx940, gfx941 indextype: *i32