/* * Copyright (c) Advanced Micro Devices, Inc. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ #ifndef UALOE_MCDI_DEFS_H #define UALOE_MCDI_DEFS_H #include #include #include "ifoe_mcdi_hostapp.h" /* ----------------- */ /* Types and Defines */ /* ----------------- */ /** Ethernet auto-negotiotion types as defined in IEEE802.3 */ typedef enum ualoe_an_type { UALOE_AN_TYPE_NONE = MC_CMD_AN_NONE, UALOE_AN_TYPE_CLAUSE28 = MC_CMD_AN_CLAUSE28, UALOE_AN_TYPE_CLAUSE37 = MC_CMD_AN_CLAUSE37, UALOE_AN_TYPE_CLAUSE73 = MC_CMD_AN_CLAUSE73 } ualoe_an_type_e; /** Macro to generate a mask from ualoe_an_type_e enums */ #define UALOE_AN_TYPE_MASK(type) (1 << (UALOE_AN_TYPE_##type)) /** Forward error correction types defined in IEEE802.3 */ typedef enum ualoe_fec_mode { UALOE_FEC_MODE_NONE = MC_CMD_FEC_NONE, UALOE_FEC_MODE_BASER = MC_CMD_FEC_BASER, UALOE_FEC_MODE_RS = MC_CMD_FEC_RS, UALOE_FEC_MODE_RS_INT = MC_CMD_FEC_IEEE_RS_INT, UALOE_FEC_MODE_ETCS_RS_LL = MC_CMD_FEC_ETCS_RS_LL, UALOE_FEC_MODE_AUTO = MC_CMD_FEC_AUTO } ualoe_fec_mode_e; /** Macro to generate a mask from ualoe_fec_mode_e enums */ #define UALOE_FEC_MODE_MASK(mode) (1 << (UALOE_FEC_MODE_##mode)) /** Ethernet technology as defined by IEEE802.3 */ typedef enum ualoe_eth_tech { UALOE_ETH_TECH_1000BASE_KX = MC_CMD_ETH_TECH_1000BASE_KX, UALOE_ETH_TECH_10GBASE_KR = MC_CMD_ETH_TECH_10GBASE_KR, UALOE_ETH_TECH_40GBASE_KR4 = MC_CMD_ETH_TECH_40GBASE_KR4, UALOE_ETH_TECH_40GBASE_CR4 = MC_CMD_ETH_TECH_40GBASE_CR4, UALOE_ETH_TECH_40GBASE_SR4 = MC_CMD_ETH_TECH_40GBASE_SR4, UALOE_ETH_TECH_40GBASE_LR4 = MC_CMD_ETH_TECH_40GBASE_LR4, UALOE_ETH_TECH_25GBASE_CR = MC_CMD_ETH_TECH_25GBASE_CR, UALOE_ETH_TECH_25GBASE_KR = MC_CMD_ETH_TECH_25GBASE_KR, UALOE_ETH_TECH_25GBASE_SR = MC_CMD_ETH_TECH_25GBASE_SR, UALOE_ETH_TECH_50GBASE_CR2 = MC_CMD_ETH_TECH_50GBASE_CR2, UALOE_ETH_TECH_50GBASE_KR2 = MC_CMD_ETH_TECH_50GBASE_KR2, UALOE_ETH_TECH_100GBASE_KR4 = MC_CMD_ETH_TECH_100GBASE_KR4, UALOE_ETH_TECH_100GBASE_SR4 = MC_CMD_ETH_TECH_100GBASE_SR4, UALOE_ETH_TECH_100GBASE_CR4 = MC_CMD_ETH_TECH_100GBASE_CR4, UALOE_ETH_TECH_100GBASE_LR4_ER4 = MC_CMD_ETH_TECH_100GBASE_LR4_ER4, UALOE_ETH_TECH_50GBASE_SR2 = MC_CMD_ETH_TECH_50GBASE_SR2, UALOE_ETH_TECH_1000BASE_X = MC_CMD_ETH_TECH_1000BASE_X, UALOE_ETH_TECH_10GBASE_CR = MC_CMD_ETH_TECH_10GBASE_CR, UALOE_ETH_TECH_10GBASE_SR = MC_CMD_ETH_TECH_10GBASE_SR, UALOE_ETH_TECH_10GBASE_LR = MC_CMD_ETH_TECH_10GBASE_LR, UALOE_ETH_TECH_10GBASE_LRM = MC_CMD_ETH_TECH_10GBASE_LRM, UALOE_ETH_TECH_10GBASE_ER = MC_CMD_ETH_TECH_10GBASE_ER, UALOE_ETH_TECH_50GBASE_KR = MC_CMD_ETH_TECH_50GBASE_KR, UALOE_ETH_TECH_50GBASE_SR = MC_CMD_ETH_TECH_50GBASE_SR, UALOE_ETH_TECH_50GBASE_CR = MC_CMD_ETH_TECH_50GBASE_CR, UALOE_ETH_TECH_50GBASE_LR_ER_FR = MC_CMD_ETH_TECH_50GBASE_LR_ER_FR, UALOE_ETH_TECH_50GBASE_DR = MC_CMD_ETH_TECH_50GBASE_DR, UALOE_ETH_TECH_100GBASE_KR2 = MC_CMD_ETH_TECH_100GBASE_KR2, UALOE_ETH_TECH_100GBASE_SR2 = MC_CMD_ETH_TECH_100GBASE_SR2, UALOE_ETH_TECH_100GBASE_CR2 = MC_CMD_ETH_TECH_100GBASE_CR2, UALOE_ETH_TECH_100GBASE_LR2_ER2_FR2 = MC_CMD_ETH_TECH_100GBASE_LR2_ER2_FR2, UALOE_ETH_TECH_100GBASE_DR2 = MC_CMD_ETH_TECH_100GBASE_DR2, UALOE_ETH_TECH_200GBASE_KR4 = MC_CMD_ETH_TECH_200GBASE_KR4, UALOE_ETH_TECH_200GBASE_SR4 = MC_CMD_ETH_TECH_200GBASE_SR4, UALOE_ETH_TECH_200GBASE_LR4_ER4_FR4 = MC_CMD_ETH_TECH_200GBASE_LR4_ER4_FR4, UALOE_ETH_TECH_200GBASE_DR4 = MC_CMD_ETH_TECH_200GBASE_DR4, UALOE_ETH_TECH_200GBASE_CR4 = MC_CMD_ETH_TECH_200GBASE_CR4, UALOE_ETH_TECH_400GBASE_KR8 = MC_CMD_ETH_TECH_400GBASE_KR8, UALOE_ETH_TECH_400GBASE_SR8 = MC_CMD_ETH_TECH_400GBASE_SR8, UALOE_ETH_TECH_400GBASE_LR8_ER8_FR8 = MC_CMD_ETH_TECH_400GBASE_LR8_ER8_FR8, UALOE_ETH_TECH_400GBASE_DR8 = MC_CMD_ETH_TECH_400GBASE_DR8, UALOE_ETH_TECH_400GBASE_CR8 = MC_CMD_ETH_TECH_400GBASE_CR8, UALOE_ETH_TECH_100GBASE_KR = MC_CMD_ETH_TECH_100GBASE_KR, UALOE_ETH_TECH_100GBASE_SR = MC_CMD_ETH_TECH_100GBASE_SR, UALOE_ETH_TECH_100GBASE_LR_ER_FR = MC_CMD_ETH_TECH_100GBASE_LR_ER_FR, UALOE_ETH_TECH_100GBASE_CR = MC_CMD_ETH_TECH_100GBASE_CR, UALOE_ETH_TECH_100GBASE_DR = MC_CMD_ETH_TECH_100GBASE_DR, UALOE_ETH_TECH_200GBASE_KR2 = MC_CMD_ETH_TECH_200GBASE_KR2, UALOE_ETH_TECH_200GBASE_SR2 = MC_CMD_ETH_TECH_200GBASE_SR2, UALOE_ETH_TECH_200GBASE_LR2_ER2_FR2 = MC_CMD_ETH_TECH_200GBASE_LR2_ER2_FR2, UALOE_ETH_TECH_200GBASE_DR2 = MC_CMD_ETH_TECH_200GBASE_DR2, UALOE_ETH_TECH_200GBASE_CR2 = MC_CMD_ETH_TECH_200GBASE_CR2, UALOE_ETH_TECH_400GBASE_KR4 = MC_CMD_ETH_TECH_400GBASE_KR4, UALOE_ETH_TECH_400GBASE_SR4 = MC_CMD_ETH_TECH_400GBASE_SR4, UALOE_ETH_TECH_400GBASE_LR4_ER4_FR4 = MC_CMD_ETH_TECH_400GBASE_LR4_ER4_FR4, UALOE_ETH_TECH_400GBASE_DR4 = MC_CMD_ETH_TECH_400GBASE_DR4, UALOE_ETH_TECH_400GBASE_CR4 = MC_CMD_ETH_TECH_400GBASE_CR4, UALOE_ETH_TECH_AUTO = MC_CMD_ETH_TECH_AUTO, UALOE_ETH_TECH_25GBASE_LR_ER = MC_CMD_ETH_TECH_25GBASE_LR_ER, UALOE_ETH_TECH_100GBASE_CR10 = MC_CMD_ETH_TECH_100GBASE_CR10, UALOE_ETH_TECH_800GBASE_KR8 = MC_CMD_ETH_TECH_800GBASE_KR8, UALOE_ETH_TECH_800GBASE_CR8 = MC_CMD_ETH_TECH_800GBASE_CR8, UALOE_ETH_TECH_800GBASE_SR8 = MC_CMD_ETH_TECH_800GBASE_SR8, UALOE_ETH_TECH_800GBASE_DR8 = MC_CMD_ETH_TECH_800GBASE_DR8, UALOE_ETH_TECH_800GBASE_VR8 = MC_CMD_ETH_TECH_800GBASE_VR8, UALOE_ETH_TECH_800GBASE_KR4 = MC_CMD_ETH_TECH_800GBASE_KR4, UALOE_ETH_TECH_800GBASE_CR4 = MC_CMD_ETH_TECH_800GBASE_CR4, UALOE_ETH_TECH_800GBASE_DR4 = MC_CMD_ETH_TECH_800GBASE_DR4, UALOE_ETH_TECH_10BASE_T = MC_CMD_ETH_TECH_10BASE_T, UALOE_ETH_TECH_100BASE_X = MC_CMD_ETH_TECH_100BASE_X, UALOE_ETH_TECH_1000BASE_SX = MC_CMD_ETH_TECH_1000BASE_SX, UALOE_ETH_TECH_1000BASE_LX = MC_CMD_ETH_TECH_1000BASE_LX, UALOE_ETH_TECH_1000BASE_LX10 = MC_CMD_ETH_TECH_1000BASE_LX10, UALOE_ETH_TECH_1000BASE_BX10 = MC_CMD_ETH_TECH_1000BASE_BX10, UALOE_ETH_TECH_2500BASE_KX = MC_CMD_ETH_TECH_2500BASE_KX, UALOE_ETH_TECH_5GBASE_KR = MC_CMD_ETH_TECH_5GBASE_KR, UALOE_ETH_TECH_200GBASE_KR1 = MC_CMD_ETH_TECH_200GBASE_KR1, UALOE_ETH_TECH_200GBASE_CR1 = MC_CMD_ETH_TECH_200GBASE_CR1, UALOE_ETH_TECH_200GBASE_DR1 = MC_CMD_ETH_TECH_200GBASE_DR1, UALOE_ETH_TECH_400GBASE_KR2 = MC_CMD_ETH_TECH_400GBASE_KR2, UALOE_ETH_TECH_400GBASE_CR2 = MC_CMD_ETH_TECH_400GBASE_CR2, UALOE_ETH_TECH_400GBASE_DR2 = MC_CMD_ETH_TECH_400GBASE_DR2 } ualoe_eth_tech_e; /** Macro to generate a mask from ualoe_eth_tech_e enums */ #define UALOE_ETH_TECH_MASK(tech) ((__uint128_t(1)) << (UALOE_ETH_TECH_##tech)) /** Ethernet pause modes defined in IEEE 802.3 Clause 73.6.6 */ typedef enum ualoe_eth_pause_mode { UALOE_ETH_PAUSE_MODE_AN_PAUSE = MC_CMD_PAUSE_MODE_AN_PAUSE, UALOE_ETH_PAUSE_MODE_AN_ASYM_DIR = MC_CMD_PAUSE_MODE_AN_ASYM_DIR } ualoe_eth_pause_mode_e; /** Macro to generate a mask from ualoe_eth_pause_mode_e enums */ #define UALOE_ETH_PAUSE_MASK(mode) (1 << (UALOE_ETH_PAUSE_MODE_##mode)) /** Ethernet flow control modes */ typedef enum ualoe_eth_fctrl { UALOE_ETH_FCTRL_OFF = MC_CMD_FCNTL_OFF, UALOE_ETH_FCTRL_RESPOND = MC_CMD_FCNTL_RESPOND, UALOE_ETH_FCTRL_BIDIR = MC_CMD_FCNTL_BIDIR, UALOE_ETH_FCTRL_AUTO = MC_CMD_FCNTL_AUTO, UALOE_ETH_FCTRL_QBB = MC_CMD_FCNTL_QBB, UALOE_ETH_FCTRL_GENERATE = MC_CMD_FCNTL_GENERATE } ualoe_eth_fctrl_e; /** Macro to generate a mask from ualoe_eth_fctrl_e enums */ #define UALOE_ETH_FCTRL_MASK(mode) (1 << (UALOE_ETH_FCTRL_##mode)) /** PMA Transit Equalization Cursor Type */ typedef enum ualoe_pma_txeq_cursor_type { UALOE_PMA_TXEQ_CURSOR_TYPE_PRE3 = PMA_TXEQ_CURSOR_TYPE_PRE3, UALOE_PMA_TXEQ_CURSOR_TYPE_PRE2 = PMA_TXEQ_CURSOR_TYPE_PRE2, UALOE_PMA_TXEQ_CURSOR_TYPE_PRE1 = PMA_TXEQ_CURSOR_TYPE_PRE1, UALOE_PMA_TXEQ_CURSOR_TYPE_MAIN = PMA_TXEQ_CURSOR_TYPE_MAIN, UALOE_PMA_TXEQ_CURSOR_TYPE_POST1 = PMA_TXEQ_CURSOR_TYPE_POST1 } ualoe_pma_txeq_cursor_type_e; /** PMA lane polarities */ typedef enum ualoe_pma_polarity { UALOE_PMA_POLARITY_BOARD_DEFAULT = PMA_POLARITY_TYPE_BOARD_DEFAULT, UALOE_PMA_POLARITY_NON_INVERTED = PMA_POLARITY_TYPE_NON_INVERTED, UALOE_PMA_POLARITY_INVERTED = PMA_POLARITY_TYPE_INVERTED } ualoe_pma_polarity_e; /** PMA rates */ typedef enum ualoe_pma_rate { UALOE_PMA_RATE_POWER_DOWN = PMA_RATE_SPECIFIER_POWER_DOWN, UALOE_PMA_RATE_1P250_NRZ = PMA_RATE_SPECIFIER_1P250_NRZ, UALOE_PMA_RATE_10P3125_NRZ = PMA_RATE_SPECIFIER_10P3125_NRZ, UALOE_PMA_RATE_25P78125_NRZ = PMA_RATE_SPECIFIER_25P78125_NRZ, UALOE_PMA_RATE_53P125_PAM4 = PMA_RATE_SPECIFIER_53P125_PAM4, UALOE_PMA_RATE_106P25_PAM4 = PMA_RATE_SPECIFIER_106P25_PAM4, UALOE_PMA_RATE_212P5_PAM4 = PMA_RATE_SPECIFIER_212P5_PAM4 } ualoe_pma_rate_e; typedef enum ualoe_prbs_pattern { UALOE_PRBS_PATTERN_DEFAULT = PMA_PRBS_PATTERN_DEFAULT, UALOE_PRBS_PATTERN_PRBS7 = PMA_PRBS_PATTERN_PRBS7, UALOE_PRBS_PATTERN_PRBS9 = PMA_PRBS_PATTERN_PRBS9, UALOE_PRBS_PATTERN_PRBS11 = PMA_PRBS_PATTERN_PRBS11, UALOE_PRBS_PATTERN_PRBS13 = PMA_PRBS_PATTERN_PRBS13, UALOE_PRBS_PATTERN_PRBS15 = PMA_PRBS_PATTERN_PRBS15, UALOE_PRBS_PATTERN_PRBS23 = PMA_PRBS_PATTERN_PRBS23, UALOE_PRBS_PATTERN_PRBS31 = PMA_PRBS_PATTERN_PRBS31, UALOE_PRBS_PATTERN_QPRBS13 = PMA_PRBS_PATTERN_QPRBS13, UALOE_PRBS_PATTERN_JP03A = PMA_PRBS_PATTERN_JP03A, UALOE_PRBS_PATTERN_JP03B = PMA_PRBS_PATTERN_JP03B, UALOE_PRBS_PATTERN_TRANS_LINEARITY = PMA_PRBS_PATTERN_TRANS_LINEARITY, UALOE_PRBS_PATTERN_USER_DEFINED = PMA_PRBS_PATTERN_USER_DEFINED } ualoe_prbs_pattern_e; /** Definition of loopback modes */ typedef enum ualoe_netport_loopback_mode { UALOE_NETPORT_LOOPBACK_NONE = MC_CMD_LOOPBACK_V2_NONE, UALOE_NETPORT_LOOPBACK_AUTO = MC_CMD_LOOPBACK_V2_AUTO, UALOE_NETPORT_LOOPBACK_POST_MAC = MC_CMD_LOOPBACK_V2_POST_MAC, UALOE_NETPORT_LOOPBACK_POST_PCS = MC_CMD_LOOPBACK_V2_POST_PCS, UALOE_NETPORT_LOOPBACK_POST_PMA = MC_CMD_LOOPBACK_V2_POST_PMA, UALOE_NETPORT_LOOPBACK_POST_MDI_WS = MC_CMD_LOOPBACK_V2_POST_MDI_WS, UALOE_NETPORT_LOOPBACK_POST_PMA_WS = MC_CMD_LOOPBACK_V2_POST_PMA_WS, UALOE_NETPORT_LOOPBACK_POST_PCS_WS = MC_CMD_LOOPBACK_V2_POST_PCS_WS, UALOE_NETPORT_LOOPBACK_POST_MAC_WS = MC_CMD_LOOPBACK_V2_POST_MAC_WS, UALOE_NETPORT_LOOPBACK_POST_PRE_MAC = MC_CMD_LOOPBACK_V2_PRE_MAC } ualoe_netport_loopback_mode_e; /** Macro to generate a mask from ualoe_netport_loopback_mode_e enums */ #define UALOE_NETPORT_LOOPBACK_MASK(mode) (1 << (UALOE_NETPORT_LOOPBACK_##mode)) /** Definition of ethernet link status flags */ #define UALOE_NETPORT_STATUS_FLAG_LINK_UP (1 << MC_CMD_LINK_STATUS_FLAGS_LINK_UP) #define UALOE_NETPORT_STATUS_FLAG_NO_PHY_LINK (1 << MC_CMD_LINK_STATUS_FLAGS_NO_PHY_LINK) #define UALOE_NETPORT_STATUS_FLAG_PMD_MDI_DISCONNECTED \ (1 << MC_CMD_LINK_STATUS_FLAGS_PMD_MDI_DISCONNECTED) #define UALOE_NETPORT_STATUS_FLAG_PMD_BAD (1 << MC_CMD_LINK_STATUS_FLAGS_PMD_BAD) #define UALOE_NETPORT_STATUS_FLAG_PMD_UNSUPPORTED (1 << MC_CMD_LINK_STATUS_FLAGS_PMD_UNSUPPORTED) #define UALOE_NETPORT_STATUS_FLAG_PMD_COMMS_FAULT (1 << MC_CMD_LINK_STATUS_FLAGS_PMD_COMMS_FAULT) #define UALOE_NETPORT_STATUS_FLAG_PMD_POWER_FAULT (1 << MC_CMD_LINK_STATUS_FLAGS_PMD_POWER_FAULT) #define UALOE_NETPORT_STATUS_FLAG_PMD_THERMAL_FAULT \ (1 << MC_CMD_LINK_STATUS_FLAGS_PMD_THERMAL_FAULT) #define UALOE_NETPORT_STATUS_FLAG_PMD_LOS (1 << MC_CMD_LINK_STATUS_FLAGS_PMD_LOS) #define UALOE_NETPORT_STATUS_FLAG_PMA_NO_CDR_LOCK (1 << MC_CMD_LINK_STATUS_FLAGS_PMA_NO_CDR_LOCK) #define UALOE_NETPORT_STATUS_FLAG_PMA_LOS (1 << MC_CMD_LINK_STATUS_FLAGS_PMA_LOS) #define UALOE_NETPORT_STATUS_FLAG_PCS_NO_BLOCK_LOCK \ (1 << MC_CMD_LINK_STATUS_FLAGS_PCS_NO_BLOCK_LOCK) #define UALOE_NETPORT_STATUS_FLAG_PCS_NO_AM_LOCK (1 << MC_CMD_LINK_STATUS_FLAGS_PCS_NO_AM_LOCK) #define UALOE_NETPORT_STATUS_FLAG_PCS_NO_ALIGN_LOCK \ (1 << MC_CMD_LINK_STATUS_FLAGS_PCS_NO_ALIGN_LOCK) #define UALOE_NETPORT_STATUS_FLAG_PCS_HI_BER (1 << MC_CMD_LINK_STATUS_FLAGS_PCS_HI_BER) #define UALOE_NETPORT_STATUS_FLAG_FEC_NO_LOCK (1 << MC_CMD_LINK_STATUS_FLAGS_FEC_NO_LOCK) #define UALOE_NETPORT_STATUS_FLAG_FEC_HI_SER (1 << MC_CMD_LINK_STATUS_FLAGS_FEC_HI_SER) #define UALOE_NETPORT_STATUS_FLAG_FEC_LOCAL_DEGRADED \ (1 << MC_CMD_LINK_STATUS_FLAGS_FEC_LOCAL_DEGRADED) #define UALOE_NETPORT_STATUS_FLAG_FEC_RM_DEGRADED (1 << MC_CMD_LINK_STATUS_FLAGS_FEC_RM_DEGRADED) #define UALOE_NETPORT_STATUS_FLAG_FEC_DEGRADED_SER (1 << MC_CMD_LINK_STATUS_FLAGS_FEC_DEGRADED_SER) #define UALOE_NETPORT_STATUS_FLAG_AN_ABLE (1 << MC_CMD_LINK_STATUS_FLAGS_AN_ABLE) #define UALOE_NETPORT_STATUS_FLAG_AN_BP_FAILED (1 << MC_CMD_LINK_STATUS_FLAGS_AN_BP_FAILED) #define UALOE_NETPORT_STATUS_FLAG_AN_NP_FAILED (1 << MC_CMD_LINK_STATUS_FLAGS_AN_NP_FAILED) #define UALOE_NETPORT_STATUS_FLAG_AN_NO_HCD (1 << MC_CMD_LINK_STATUS_FLAGS_AN_NO_HCD) #define UALOE_NETPORT_STATUS_FLAG_LT_NO_LOCAL_FRAME_LO \ (1 << MC_CMD_LINK_STATUS_FLAGS_LT_NO_LOCAL_FRAME_LOCK) #define UALOE_NETPORT_STATUS_FLAG_LT_NO_RM_FRAME_LOCK \ (1 << MC_CMD_LINK_STATUS_FLAGS_LT_NO_RM_FRAME_LOCK) #define UALOE_NETPORT_STATUS_FLAG_LT_NO_RX_READY (1 << MC_CMD_LINK_STATUS_FLAGS_LT_NO_RX_READY) /** Definition of ethernet link control flags */ #define UALOE_NETPORT_CTRL_FLAG_AUTONEG_EN (1 << MC_CMD_LINK_FLAGS_AUTONEG_EN) #define UALOE_NETPORT_CTRL_FLAG_PARALLEL_DETECT_EN (1 << MC_CMD_LINK_FLAGS_PARALLEL_DETECT_EN) #define UALOE_NETPORT_CTRL_FLAG_LINK_DISABLE (1 << MC_CMD_LINK_FLAGS_LINK_DISABLE) #define UALOE_NETPORT_CTRL_FLAG_POWER_OFF (1 << MC_CMD_LINK_FLAGS_POWER_OFF) #endif // UALOE_MCDI_DEFS_H