# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -mtriple aarch64-unknown-unknown -verify-machineinstrs -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=NO-FP16 # RUN: llc -mtriple aarch64-unknown-unknown -verify-machineinstrs -mattr=+fullfp16 -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=FP16 ... --- name: fadd tracksRegLiveness: true body: | bb.0: liveins: $h0, $h1 ; NO-FP16-LABEL: name: fadd ; NO-FP16: liveins: $h0, $h1 ; NO-FP16-NEXT: {{ $}} ; NO-FP16-NEXT: %x:_(f16) = COPY $h0 ; NO-FP16-NEXT: %y:_(f16) = COPY $h1 ; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(f32) = G_FPEXT %x(f16) ; NO-FP16-NEXT: [[FPEXT1:%[0-9]+]]:_(f32) = G_FPEXT %y(f16) ; NO-FP16-NEXT: [[FADD:%[0-9]+]]:_(f32) = G_FADD [[FPEXT]], [[FPEXT1]] ; NO-FP16-NEXT: %op:_(f16) = G_FPTRUNC [[FADD]](f32) ; NO-FP16-NEXT: $h0 = COPY %op(f16) ; NO-FP16-NEXT: RET_ReallyLR implicit $h0 ; ; FP16-LABEL: name: fadd ; FP16: liveins: $h0, $h1 ; FP16-NEXT: {{ $}} ; FP16-NEXT: %x:_(f16) = COPY $h0 ; FP16-NEXT: %y:_(f16) = COPY $h1 ; FP16-NEXT: %op:_(f16) = G_FADD %x, %y ; FP16-NEXT: $h0 = COPY %op(f16) ; FP16-NEXT: RET_ReallyLR implicit $h0 %x:_(f16) = COPY $h0 %y:_(f16) = COPY $h1 %op:_(f16) = G_FADD %x, %y $h0 = COPY %op(f16) RET_ReallyLR implicit $h0 ... --- name: fsub tracksRegLiveness: true body: | bb.0: liveins: $h0, $h1 ; NO-FP16-LABEL: name: fsub ; NO-FP16: liveins: $h0, $h1 ; NO-FP16-NEXT: {{ $}} ; NO-FP16-NEXT: %x:_(f16) = COPY $h0 ; NO-FP16-NEXT: %y:_(f16) = COPY $h1 ; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(f32) = G_FPEXT %x(f16) ; NO-FP16-NEXT: [[FPEXT1:%[0-9]+]]:_(f32) = G_FPEXT %y(f16) ; NO-FP16-NEXT: [[FSUB:%[0-9]+]]:_(f32) = G_FSUB [[FPEXT]], [[FPEXT1]] ; NO-FP16-NEXT: %op:_(f16) = G_FPTRUNC [[FSUB]](f32) ; NO-FP16-NEXT: $h0 = COPY %op(f16) ; NO-FP16-NEXT: RET_ReallyLR implicit $h0 ; ; FP16-LABEL: name: fsub ; FP16: liveins: $h0, $h1 ; FP16-NEXT: {{ $}} ; FP16-NEXT: %x:_(f16) = COPY $h0 ; FP16-NEXT: %y:_(f16) = COPY $h1 ; FP16-NEXT: %op:_(f16) = G_FSUB %x, %y ; FP16-NEXT: $h0 = COPY %op(f16) ; FP16-NEXT: RET_ReallyLR implicit $h0 %x:_(f16) = COPY $h0 %y:_(f16) = COPY $h1 %op:_(f16) = G_FSUB %x, %y $h0 = COPY %op(f16) RET_ReallyLR implicit $h0 ... --- name: fmul tracksRegLiveness: true body: | bb.0: liveins: $h0, $h1 ; NO-FP16-LABEL: name: fmul ; NO-FP16: liveins: $h0, $h1 ; NO-FP16-NEXT: {{ $}} ; NO-FP16-NEXT: %x:_(f16) = COPY $h0 ; NO-FP16-NEXT: %y:_(f16) = COPY $h1 ; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(f32) = G_FPEXT %x(f16) ; NO-FP16-NEXT: [[FPEXT1:%[0-9]+]]:_(f32) = G_FPEXT %y(f16) ; NO-FP16-NEXT: [[FMUL:%[0-9]+]]:_(f32) = G_FMUL [[FPEXT]], [[FPEXT1]] ; NO-FP16-NEXT: %op:_(f16) = G_FPTRUNC [[FMUL]](f32) ; NO-FP16-NEXT: $h0 = COPY %op(f16) ; NO-FP16-NEXT: RET_ReallyLR implicit $h0 ; ; FP16-LABEL: name: fmul ; FP16: liveins: $h0, $h1 ; FP16-NEXT: {{ $}} ; FP16-NEXT: %x:_(f16) = COPY $h0 ; FP16-NEXT: %y:_(f16) = COPY $h1 ; FP16-NEXT: %op:_(f16) = G_FMUL %x, %y ; FP16-NEXT: $h0 = COPY %op(f16) ; FP16-NEXT: RET_ReallyLR implicit $h0 %x:_(f16) = COPY $h0 %y:_(f16) = COPY $h1 %op:_(f16) = G_FMUL %x, %y $h0 = COPY %op(f16) RET_ReallyLR implicit $h0 ... --- name: fdiv tracksRegLiveness: true body: | bb.0: liveins: $h0, $h1 ; NO-FP16-LABEL: name: fdiv ; NO-FP16: liveins: $h0, $h1 ; NO-FP16-NEXT: {{ $}} ; NO-FP16-NEXT: %x:_(f16) = COPY $h0 ; NO-FP16-NEXT: %y:_(f16) = COPY $h1 ; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(f32) = G_FPEXT %x(f16) ; NO-FP16-NEXT: [[FPEXT1:%[0-9]+]]:_(f32) = G_FPEXT %y(f16) ; NO-FP16-NEXT: [[FDIV:%[0-9]+]]:_(f32) = G_FDIV [[FPEXT]], [[FPEXT1]] ; NO-FP16-NEXT: %op:_(f16) = G_FPTRUNC [[FDIV]](f32) ; NO-FP16-NEXT: $h0 = COPY %op(f16) ; NO-FP16-NEXT: RET_ReallyLR implicit $h0 ; ; FP16-LABEL: name: fdiv ; FP16: liveins: $h0, $h1 ; FP16-NEXT: {{ $}} ; FP16-NEXT: %x:_(f16) = COPY $h0 ; FP16-NEXT: %y:_(f16) = COPY $h1 ; FP16-NEXT: %op:_(f16) = G_FDIV %x, %y ; FP16-NEXT: $h0 = COPY %op(f16) ; FP16-NEXT: RET_ReallyLR implicit $h0 %x:_(f16) = COPY $h0 %y:_(f16) = COPY $h1 %op:_(f16) = G_FDIV %x, %y $h0 = COPY %op(f16) RET_ReallyLR implicit $h0 ... --- name: fneg tracksRegLiveness: true body: | bb.0: liveins: $h0 ; NO-FP16-LABEL: name: fneg ; NO-FP16: liveins: $h0 ; NO-FP16-NEXT: {{ $}} ; NO-FP16-NEXT: %x:_(f16) = COPY $h0 ; NO-FP16-NEXT: [[BITCAST:%[0-9]+]]:_(i16) = G_BITCAST %x(f16) ; NO-FP16-NEXT: [[ANYEXT:%[0-9]+]]:_(i32) = G_ANYEXT [[BITCAST]](i16) ; NO-FP16-NEXT: [[C:%[0-9]+]]:_(i32) = G_CONSTANT i32 -32768 ; NO-FP16-NEXT: [[XOR:%[0-9]+]]:_(i32) = G_XOR [[ANYEXT]], [[C]] ; NO-FP16-NEXT: [[TRUNC:%[0-9]+]]:_(i16) = G_TRUNC [[XOR]](i32) ; NO-FP16-NEXT: %op:_(f16) = G_BITCAST [[TRUNC]](i16) ; NO-FP16-NEXT: $h0 = COPY %op(f16) ; NO-FP16-NEXT: RET_ReallyLR implicit $h0 ; ; FP16-LABEL: name: fneg ; FP16: liveins: $h0 ; FP16-NEXT: {{ $}} ; FP16-NEXT: %x:_(f16) = COPY $h0 ; FP16-NEXT: %op:_(f16) = G_FNEG %x ; FP16-NEXT: $h0 = COPY %op(f16) ; FP16-NEXT: RET_ReallyLR implicit $h0 %x:_(f16) = COPY $h0 %op:_(f16) = G_FNEG %x $h0 = COPY %op(f16) RET_ReallyLR implicit $h0 ...