// COM: Direct HotSwap entry displacement is supported across gfx125x. // RUN: %clang -target amdgcn-amd-amdhsa -mcpu=gfx1251 -nostdlib %s -o %t.gfx1251.elf // RUN: hotswap-rewrite %t.gfx1251.elf \ // RUN: amdgcn-amd-amdhsa--gfx1251 amdgcn-amd-amdhsa--gfx1251 \ // RUN: --entry-trampolines --output %t.gfx1251.out.elf \ // RUN: | %FileCheck --check-prefix=API %s // RUN: %llvm-objdump -d %t.gfx1251.out.elf | %FileCheck --check-prefix=DISASM %s // COM: Direct displacement does not need scratch SGPRs, so it remains valid at // COM: the architectural SGPR limit. // RUN: sed 's/.sgpr_count: 1/.sgpr_count: 105/' %s > %t.highsgpr.s // RUN: %clang -target amdgcn-amd-amdhsa -mcpu=gfx1251 -nostdlib \ // RUN: %t.highsgpr.s -o %t.highsgpr.elf // RUN: hotswap-rewrite %t.highsgpr.elf \ // RUN: amdgcn-amd-amdhsa--gfx1251 amdgcn-amd-amdhsa--gfx1251 \ // RUN: --entry-trampolines --output %t.highsgpr.out.elf \ // RUN: | %FileCheck --check-prefix=API %s // RUN: %llvm-objdump -d %t.highsgpr.out.elf \ // RUN: | %FileCheck --check-prefix=DISASM %s // COM: gfx12-5-generic omitted: its entry-trampoline path needs newer // COM: gfx12-5-generic assembler support than this branch's LLVM base. // API: RESULT: SUCCESS // DISASM-LABEL: : // DISASM-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE // DISASM-NEXT: v_nop // DISASM-NEXT: v_mov_b32_e32 v0, 0 // DISASM-NEXT: s_endpgm // DISASM-NOT: s_get_pc_i64 .amdgcn_target "amdgcn-amd-amdhsa--gfx1251" .text .globl entry_tramp_family_kernel .p2align 8 .type entry_tramp_family_kernel,@function entry_tramp_family_kernel: v_mov_b32_e32 v0, 0 s_endpgm .Lentry_tramp_family_kernel_end: .size entry_tramp_family_kernel, .Lentry_tramp_family_kernel_end-entry_tramp_family_kernel .rodata .p2align 8 .amdhsa_kernel entry_tramp_family_kernel .amdhsa_next_free_vgpr 1 .amdhsa_next_free_sgpr 1 .amdhsa_inst_pref_size 7 .end_amdhsa_kernel .amdgpu_metadata amdhsa.version: - 3 - 0 amdhsa.kernels: - .name: entry_tramp_family_kernel .symbol: entry_tramp_family_kernel.kd .sgpr_count: 1 .vgpr_count: 1 .kernarg_segment_size: 0 .group_segment_fixed_size: 0 .private_segment_fixed_size: 0 .kernarg_segment_align: 8 .wavefront_size: 64 .max_flat_workgroup_size: 256 .end_amdgpu_metadata