# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s --- name: combine_or_of_and tracksRegLiveness: true body: | bb.0: liveins: $x0, $x1 ; CHECK-LABEL: name: combine_or_of_and ; CHECK: liveins: $x0, $x1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %x:_(s64) = COPY $x0 ; CHECK-NEXT: $x0 = COPY %x(s64) ; CHECK-NEXT: RET_ReallyLR implicit $x0 %x:_(s64) = COPY $x0 %y:_(s64) = COPY $x1 %and:_(s64) = G_AND %x, %y %dst:_(s64) = G_OR %and, %x $x0 = COPY %dst RET_ReallyLR implicit $x0 ... --- name: combine_or_of_and_commuted tracksRegLiveness: true body: | bb.0: liveins: $x0, $x1 ; CHECK-LABEL: name: combine_or_of_and_commuted ; CHECK: liveins: $x0, $x1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %x:_(s64) = COPY $x0 ; CHECK-NEXT: $x0 = COPY %x(s64) ; CHECK-NEXT: RET_ReallyLR implicit $x0 %x:_(s64) = COPY $x0 %y:_(s64) = COPY $x1 %and:_(s64) = G_AND %y, %x %dst:_(s64) = G_OR %and, %x $x0 = COPY %dst RET_ReallyLR implicit $x0 ... --- name: combine_or_of_and_commuted2 tracksRegLiveness: true body: | bb.0: liveins: $x0, $x1 ; CHECK-LABEL: name: combine_or_of_and_commuted2 ; CHECK: liveins: $x0, $x1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %x:_(s64) = COPY $x0 ; CHECK-NEXT: $x0 = COPY %x(s64) ; CHECK-NEXT: RET_ReallyLR implicit $x0 %x:_(s64) = COPY $x0 %y:_(s64) = COPY $x1 %and:_(s64) = G_AND %x, %y %dst:_(s64) = G_OR %x, %and $x0 = COPY %dst RET_ReallyLR implicit $x0 ... --- name: combine_or_of_and_commuted3 tracksRegLiveness: true body: | bb.0: liveins: $x0, $x1 ; CHECK-LABEL: name: combine_or_of_and_commuted3 ; CHECK: liveins: $x0, $x1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %x:_(s64) = COPY $x0 ; CHECK-NEXT: $x0 = COPY %x(s64) ; CHECK-NEXT: RET_ReallyLR implicit $x0 %x:_(s64) = COPY $x0 %y:_(s64) = COPY $x1 %and:_(s64) = G_AND %y, %x %dst:_(s64) = G_OR %x, %and $x0 = COPY %dst RET_ReallyLR implicit $x0 ... --- name: combine_or_of_and_vector tracksRegLiveness: true body: | bb.0: liveins: $d0, $d1 ; CHECK-LABEL: name: combine_or_of_and_vector ; CHECK: liveins: $d0, $d1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %x:_(<4 x s16>) = COPY $d0 ; CHECK-NEXT: $d0 = COPY %x(<4 x s16>) ; CHECK-NEXT: RET_ReallyLR implicit $d0 %x:_(<4 x s16>) = COPY $d0 %y:_(<4 x s16>) = COPY $d1 %and:_(<4 x s16>) = G_AND %x, %y %dst:_(<4 x s16>) = G_OR %and, %x $d0 = COPY %dst RET_ReallyLR implicit $d0 ... --- name: combine_or_of_and_vector_commuted tracksRegLiveness: true body: | bb.0: liveins: $d0, $d1 ; CHECK-LABEL: name: combine_or_of_and_vector_commuted ; CHECK: liveins: $d0, $d1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %x:_(<4 x s16>) = COPY $d0 ; CHECK-NEXT: $d0 = COPY %x(<4 x s16>) ; CHECK-NEXT: RET_ReallyLR implicit $d0 %x:_(<4 x s16>) = COPY $d0 %y:_(<4 x s16>) = COPY $d1 %and:_(<4 x s16>) = G_AND %y, %x %dst:_(<4 x s16>) = G_OR %and, %x $d0 = COPY %dst RET_ReallyLR implicit $d0 ... --- name: combine_or_of_and_vector_commuted2 tracksRegLiveness: true body: | bb.0: liveins: $d0, $d1 ; CHECK-LABEL: name: combine_or_of_and_vector_commuted2 ; CHECK: liveins: $d0, $d1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %x:_(<4 x s16>) = COPY $d0 ; CHECK-NEXT: $d0 = COPY %x(<4 x s16>) ; CHECK-NEXT: RET_ReallyLR implicit $d0 %x:_(<4 x s16>) = COPY $d0 %y:_(<4 x s16>) = COPY $d1 %and:_(<4 x s16>) = G_AND %x, %y %dst:_(<4 x s16>) = G_OR %x, %and $d0 = COPY %dst RET_ReallyLR implicit $d0 ... --- name: combine_or_of_and_vector_commuted3 tracksRegLiveness: true body: | bb.0: liveins: $d0, $d1 ; CHECK-LABEL: name: combine_or_of_and_vector_commuted3 ; CHECK: liveins: $d0, $d1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %x:_(<4 x s16>) = COPY $d0 ; CHECK-NEXT: $d0 = COPY %x(<4 x s16>) ; CHECK-NEXT: RET_ReallyLR implicit $d0 %x:_(<4 x s16>) = COPY $d0 %y:_(<4 x s16>) = COPY $d1 %and:_(<4 x s16>) = G_AND %y, %x %dst:_(<4 x s16>) = G_OR %x, %and $d0 = COPY %dst RET_ReallyLR implicit $d0 ...