# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
---
name:            test_icmp
body:             |
  bb.0.entry:
    ; CHECK-LABEL: name: test_icmp
    ; CHECK: [[COPY:%[0-9]+]]:_(f64) = COPY $x0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(f64) = COPY $x0
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(f32) = COPY $w0
    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(f32) = COPY $w0
    ; CHECK-NEXT: [[FCMP:%[0-9]+]]:_(i32) = G_FCMP floatpred(oge), [[COPY]](f64), [[COPY1]]
    ; CHECK-NEXT: $w0 = COPY [[FCMP]](i32)
    ; CHECK-NEXT: [[FCMP1:%[0-9]+]]:_(i32) = G_FCMP floatpred(uno), [[COPY2]](f32), [[COPY3]]
    ; CHECK-NEXT: $w0 = COPY [[FCMP1]](i32)
    %0:_(f64) = COPY $x0
    %1:_(f64) = COPY $x0
    %2:_(f32) = COPY $w0
    %3:_(f32) = COPY $w0
    %4:_(i32) = G_FCMP floatpred(oge), %0(f64), %1
    $w0 = COPY %4(i32)
    %5:_(i32) = G_FCMP floatpred(uno), %2(f32), %3
    $w0 = COPY %5(i32)

...
---
name:            legalize_v8s16
alignment:       4
legalized:       true
body:             |
  bb.0:
    liveins: $q0, $q1

    ; CHECK-LABEL: name: legalize_v8s16
    ; CHECK: liveins: $q0, $q1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %lhs:_(<8 x f16>) = COPY $q0
    ; CHECK-NEXT: %rhs:_(<8 x f16>) = COPY $q1
    ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<4 x f16>), [[UV1:%[0-9]+]]:_(<4 x f16>) = G_UNMERGE_VALUES %lhs(<8 x f16>)
    ; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(<4 x f32>) = G_FPEXT [[UV]](<4 x f16>)
    ; CHECK-NEXT: [[FPEXT1:%[0-9]+]]:_(<4 x f32>) = G_FPEXT [[UV1]](<4 x f16>)
    ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<4 x f16>), [[UV3:%[0-9]+]]:_(<4 x f16>) = G_UNMERGE_VALUES %rhs(<8 x f16>)
    ; CHECK-NEXT: [[FPEXT2:%[0-9]+]]:_(<4 x f32>) = G_FPEXT [[UV2]](<4 x f16>)
    ; CHECK-NEXT: [[FPEXT3:%[0-9]+]]:_(<4 x f32>) = G_FPEXT [[UV3]](<4 x f16>)
    ; CHECK-NEXT: [[FCMP:%[0-9]+]]:_(<4 x i32>) = G_FCMP floatpred(oeq), [[FPEXT]](<4 x f32>), [[FPEXT2]]
    ; CHECK-NEXT: [[FCMP1:%[0-9]+]]:_(<4 x i32>) = G_FCMP floatpred(oeq), [[FPEXT1]](<4 x f32>), [[FPEXT3]]
    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<4 x i16>) = G_TRUNC [[FCMP]](<4 x i32>)
    ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(<4 x i16>) = G_TRUNC [[FCMP1]](<4 x i32>)
    ; CHECK-NEXT: %fcmp:_(<8 x i16>) = G_CONCAT_VECTORS [[TRUNC]](<4 x i16>), [[TRUNC1]](<4 x i16>)
    ; CHECK-NEXT: $q0 = COPY %fcmp(<8 x i16>)
    ; CHECK-NEXT: RET_ReallyLR implicit $q0
    %lhs:_(<8 x f16>) = COPY $q0
    %rhs:_(<8 x f16>) = COPY $q1
    %fcmp:_(<8 x i16>) = G_FCMP floatpred(oeq), %lhs(<8 x f16>), %rhs
    $q0 = COPY %fcmp(<8 x i16>)
    RET_ReallyLR implicit $q0

...
---
name:            legalize_v4s16
alignment:       4
legalized:       true
body:             |
  bb.0:
    liveins: $d0, $d1

    ; CHECK-LABEL: name: legalize_v4s16
    ; CHECK: liveins: $d0, $d1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %lhs:_(<4 x f16>) = COPY $d0
    ; CHECK-NEXT: %rhs:_(<4 x f16>) = COPY $d1
    ; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(<4 x f32>) = G_FPEXT %lhs(<4 x f16>)
    ; CHECK-NEXT: [[FPEXT1:%[0-9]+]]:_(<4 x f32>) = G_FPEXT %rhs(<4 x f16>)
    ; CHECK-NEXT: [[FCMP:%[0-9]+]]:_(<4 x i32>) = G_FCMP floatpred(oeq), [[FPEXT]](<4 x f32>), [[FPEXT1]]
    ; CHECK-NEXT: %fcmp:_(<4 x i16>) = G_TRUNC [[FCMP]](<4 x i32>)
    ; CHECK-NEXT: $d0 = COPY %fcmp(<4 x i16>)
    ; CHECK-NEXT: RET_ReallyLR implicit $d0
    %lhs:_(<4 x f16>) = COPY $d0
    %rhs:_(<4 x f16>) = COPY $d1
    %fcmp:_(<4 x i16>) = G_FCMP floatpred(oeq), %lhs(<4 x f16>), %rhs
    $d0 = COPY %fcmp(<4 x i16>)
    RET_ReallyLR implicit $d0