# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=aarch64 -run-pass=legalizer -global-isel-abort=1 %s -o - | FileCheck %s
---
name:            fpext_v4s64_v4s32
tracksRegLiveness: true
liveins:
  - { reg: '$q0' }
  - { reg: '$x0' }
frameInfo:
  maxAlignment:    1
body:             |
  bb.1:
    liveins: $q0, $x0

    ; CHECK-LABEL: name: fpext_v4s64_v4s32
    ; CHECK: liveins: $q0, $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x f32>) = COPY $q0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x0
    ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x f32>), [[UV1:%[0-9]+]]:_(<2 x f32>) = G_UNMERGE_VALUES [[COPY]](<4 x f32>)
    ; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(<2 x f64>) = G_FPEXT [[UV]](<2 x f32>)
    ; CHECK-NEXT: [[FPEXT1:%[0-9]+]]:_(<2 x f64>) = G_FPEXT [[UV1]](<2 x f32>)
    ; CHECK-NEXT: G_STORE [[FPEXT]](<2 x f64>), [[COPY1]](p0) :: (store (<2 x f64>), align 32)
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(i64) = G_CONSTANT i64 16
    ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY1]], [[C]](i64)
    ; CHECK-NEXT: G_STORE [[FPEXT1]](<2 x f64>), [[PTR_ADD]](p0) :: (store (<2 x f64>) into unknown-address + 16)
    ; CHECK-NEXT: RET_ReallyLR
    %0:_(<4 x f32>) = COPY $q0
    %1:_(p0) = COPY $x0
    %2:_(<4 x f64>) = G_FPEXT %0(<4 x f32>)
    G_STORE %2(<4 x f64>), %1(p0) :: (store (<4 x f64>))
    RET_ReallyLR

...

---
name:            fpext_f16_f64
body:             |
  bb.0:
    liveins: $h0
    ; CHECK-LABEL: name: fpext_f16_f64
    ; CHECK: liveins: $h0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(f16) = COPY $h0
    ; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(f64) = G_FPEXT [[COPY]](f16)
    ; CHECK-NEXT: $d0 = COPY [[FPEXT]](f64)
    ; CHECK-NEXT: RET_ReallyLR implicit $d0
    %0:_(f16) = COPY $h0
    %1:_(f64) = G_FPEXT %0(f16)
    $d0 = COPY %1(f64)
    RET_ReallyLR implicit $d0
...

---
name:            fpext_v2f16_v2f64
body:             |
  bb.0:
    liveins: $d0

    ; CHECK-LABEL: name: fpext_v2f16_v2f64
    ; CHECK: liveins: $d0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x f16>) = COPY $d0
    ; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(<4 x f32>) = G_FPEXT [[COPY]](<4 x f16>)
    ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x f32>), [[UV1:%[0-9]+]]:_(<2 x f32>) = G_UNMERGE_VALUES [[FPEXT]](<4 x f32>)
    ; CHECK-NEXT: [[FPEXT1:%[0-9]+]]:_(<2 x f64>) = G_FPEXT [[UV]](<2 x f32>)
    ; CHECK-NEXT: $q0 = COPY [[FPEXT1]](<2 x f64>)
    ; CHECK-NEXT: RET_ReallyLR implicit $q0
    %1:_(<4 x f16>) = COPY $d0
    %0:_(<2 x f16>), %2:_(<2 x f16>) = G_UNMERGE_VALUES %1(<4 x f16>)
    %3:_(<2 x f64>) = G_FPEXT %0(<2 x f16>)
    $q0 = COPY %3(<2 x f64>)
    RET_ReallyLR implicit $q0
...

---
name:            fpext_v3f16_v3f64
body:             |
  bb.0:
    liveins: $d0

    ; CHECK-LABEL: name: fpext_v3f16_v3f64
    ; CHECK: liveins: $d0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x f16>) = COPY $d0
    ; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(<4 x f32>) = G_FPEXT [[COPY]](<4 x f16>)
    ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x f32>), [[UV1:%[0-9]+]]:_(<2 x f32>) = G_UNMERGE_VALUES [[FPEXT]](<4 x f32>)
    ; CHECK-NEXT: [[FPEXT1:%[0-9]+]]:_(<2 x f64>) = G_FPEXT [[UV]](<2 x f32>)
    ; CHECK-NEXT: [[FPEXT2:%[0-9]+]]:_(<2 x f64>) = G_FPEXT [[UV1]](<2 x f32>)
    ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(f64), [[UV3:%[0-9]+]]:_(f64) = G_UNMERGE_VALUES [[FPEXT1]](<2 x f64>)
    ; CHECK-NEXT: [[UV4:%[0-9]+]]:_(f64), [[UV5:%[0-9]+]]:_(f64) = G_UNMERGE_VALUES [[FPEXT2]](<2 x f64>)
    ; CHECK-NEXT: $d0 = COPY [[UV2]](f64)
    ; CHECK-NEXT: $d1 = COPY [[UV3]](f64)
    ; CHECK-NEXT: $d2 = COPY [[UV4]](f64)
    ; CHECK-NEXT: RET_ReallyLR implicit $d0, implicit $d1, implicit $d2
    %1:_(<4 x f16>) = COPY $d0
    %2:_(f16), %3:_(f16), %4:_(f16), %5:_(f16) = G_UNMERGE_VALUES %1(<4 x f16>)
    %0:_(<3 x f16>) = G_BUILD_VECTOR %2(f16), %3(f16), %4(f16)
    %6:_(<3 x f64>) = G_FPEXT %0(<3 x f16>)
    %7:_(f64), %8:_(f64), %9:_(f64) = G_UNMERGE_VALUES %6(<3 x f64>)
    $d0 = COPY %7(f64)
    $d1 = COPY %8(f64)
    $d2 = COPY %9(f64)
    RET_ReallyLR implicit $d0, implicit $d1, implicit $d2
...

---
name:            fpext_v4f16_v4f64
body:             |
  bb.0:
    liveins: $d0

    ; CHECK-LABEL: name: fpext_v4f16_v4f64
    ; CHECK: liveins: $d0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x f16>) = COPY $d0
    ; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(<4 x f32>) = G_FPEXT [[COPY]](<4 x f16>)
    ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x f32>), [[UV1:%[0-9]+]]:_(<2 x f32>) = G_UNMERGE_VALUES [[FPEXT]](<4 x f32>)
    ; CHECK-NEXT: [[FPEXT1:%[0-9]+]]:_(<2 x f64>) = G_FPEXT [[UV]](<2 x f32>)
    ; CHECK-NEXT: [[FPEXT2:%[0-9]+]]:_(<2 x f64>) = G_FPEXT [[UV1]](<2 x f32>)
    ; CHECK-NEXT: $q0 = COPY [[FPEXT1]](<2 x f64>)
    ; CHECK-NEXT: $q1 = COPY [[FPEXT2]](<2 x f64>)
    ; CHECK-NEXT: RET_ReallyLR implicit $q0, implicit $q1
    %0:_(<4 x f16>) = COPY $d0
    %1:_(<4 x f64>) = G_FPEXT %0(<4 x f16>)
    %2:_(<2 x f64>), %3:_(<2 x f64>) = G_UNMERGE_VALUES %1(<4 x f64>)
    $q0 = COPY %2(<2 x f64>)
    $q1 = COPY %3(<2 x f64>)
    RET_ReallyLR implicit $q0, implicit $q1
...

---
name:            fpext_v8f16_v8f64
body:             |
  bb.0:
    liveins: $q0

    ; CHECK-LABEL: name: fpext_v8f16_v8f64
    ; CHECK: liveins: $q0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<8 x f16>) = COPY $q0
    ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<4 x f16>), [[UV1:%[0-9]+]]:_(<4 x f16>) = G_UNMERGE_VALUES [[COPY]](<8 x f16>)
    ; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(<4 x f32>) = G_FPEXT [[UV]](<4 x f16>)
    ; CHECK-NEXT: [[FPEXT1:%[0-9]+]]:_(<4 x f32>) = G_FPEXT [[UV1]](<4 x f16>)
    ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<2 x f32>), [[UV3:%[0-9]+]]:_(<2 x f32>) = G_UNMERGE_VALUES [[FPEXT]](<4 x f32>)
    ; CHECK-NEXT: [[UV4:%[0-9]+]]:_(<2 x f32>), [[UV5:%[0-9]+]]:_(<2 x f32>) = G_UNMERGE_VALUES [[FPEXT1]](<4 x f32>)
    ; CHECK-NEXT: [[FPEXT2:%[0-9]+]]:_(<2 x f64>) = G_FPEXT [[UV2]](<2 x f32>)
    ; CHECK-NEXT: [[FPEXT3:%[0-9]+]]:_(<2 x f64>) = G_FPEXT [[UV3]](<2 x f32>)
    ; CHECK-NEXT: [[FPEXT4:%[0-9]+]]:_(<2 x f64>) = G_FPEXT [[UV4]](<2 x f32>)
    ; CHECK-NEXT: [[FPEXT5:%[0-9]+]]:_(<2 x f64>) = G_FPEXT [[UV5]](<2 x f32>)
    ; CHECK-NEXT: $q0 = COPY [[FPEXT2]](<2 x f64>)
    ; CHECK-NEXT: $q1 = COPY [[FPEXT3]](<2 x f64>)
    ; CHECK-NEXT: $q2 = COPY [[FPEXT4]](<2 x f64>)
    ; CHECK-NEXT: $q3 = COPY [[FPEXT5]](<2 x f64>)
    ; CHECK-NEXT: RET_ReallyLR implicit $q0, implicit $q1, implicit $q2, implicit $q3
    %0:_(<8 x f16>) = COPY $q0
    %1:_(<8 x f64>) = G_FPEXT %0(<8 x f16>)
    %2:_(<2 x f64>), %3:_(<2 x f64>), %4:_(<2 x f64>), %5:_(<2 x f64>) = G_UNMERGE_VALUES %1(<8 x f64>)
    $q0 = COPY %2(<2 x f64>)
    $q1 = COPY %3(<2 x f64>)
    $q2 = COPY %4(<2 x f64>)
    $q3 = COPY %5(<2 x f64>)
    RET_ReallyLR implicit $q0, implicit $q1, implicit $q2, implicit $q3
...