# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3 # RUN: llc %s -o - -mtriple=riscv64 -mattr=+v -run-pass=riscv-vector-peephole \ # RUN: -verify-machineinstrs | FileCheck %s --- name: undef_passthru body: | bb.0: liveins: $x1, $v8, $v9 ; CHECK-LABEL: name: undef_passthru ; CHECK: liveins: $x1, $v8, $v9 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %false:vrnov0 = COPY $v8 ; CHECK-NEXT: %true:vrnov0 = COPY $v9 ; CHECK-NEXT: %avl:gprnox0 = COPY $x1 ; CHECK-NEXT: %mask:vmv0 = PseudoVMSET_M_B8 %avl /* vl */, 0 /* e8 */ ; CHECK-NEXT: $v0 = COPY %mask %false:vrnov0 = COPY $v8 %true:vrnov0 = COPY $v9 %avl:gprnox0 = COPY $x1 %mask:vmv0 = PseudoVMSET_M_B8 %avl, 0 $v0 = COPY %mask %x:vrnov0 = PseudoVMERGE_VVM_M1 $noreg, %false, %true, $v0, %avl, 5 ... --- name: undef_false body: | bb.0: liveins: $x1, $v8, $v9 ; CHECK-LABEL: name: undef_false ; CHECK: liveins: $x1, $v8, $v9 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %pt:vr = COPY $v8 ; CHECK-NEXT: %false:vrnov0 = COPY $noreg ; CHECK-NEXT: %true:vrnov0 = COPY $v9 ; CHECK-NEXT: %avl:gprnox0 = COPY $x1 ; CHECK-NEXT: %mask:vmv0 = PseudoVMSET_M_B8 %avl /* vl */, 0 /* e8 */ ; CHECK-NEXT: $v0 = COPY %mask ; CHECK-NEXT: %x:vr = PseudoVMV_V_V_M1 %pt, %true, %avl /* vl */, 5 /* e32 */, 0 /* tu, mu */ %pt:vrnov0 = COPY $v8 %false:vrnov0 = COPY $noreg %true:vrnov0 = COPY $v9 %avl:gprnox0 = COPY $x1 %mask:vmv0 = PseudoVMSET_M_B8 %avl, 0 $v0 = COPY %mask %x:vrnov0 = PseudoVMERGE_VVM_M1 %pt, %false, %true, $v0, %avl, 5 ... --- name: equal_passthru_false body: | bb.0: liveins: $x1, $v8, $v9 ; CHECK-LABEL: name: equal_passthru_false ; CHECK: liveins: $x1, $v8, $v9 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %false:vrnov0 = COPY $v8 ; CHECK-NEXT: %pt:vr = COPY $v8 ; CHECK-NEXT: %true:vrnov0 = COPY $v9 ; CHECK-NEXT: %avl:gprnox0 = COPY $x1 ; CHECK-NEXT: %mask:vmv0 = PseudoVMSET_M_B8 %avl /* vl */, 0 /* e8 */ ; CHECK-NEXT: %x:vr = PseudoVMV_V_V_M1 %pt, %true, %avl /* vl */, 5 /* e32 */, 0 /* tu, mu */ %false:vrnov0 = COPY $v8 %pt:vrnov0 = COPY $v8 %true:vrnov0 = COPY $v9 %avl:gprnox0 = COPY $x1 %mask:vmv0 = PseudoVMSET_M_B8 %avl, 0 %x:vrnov0 = PseudoVMERGE_VVM_M1 %pt, %false, %true, %mask, %avl, 5 ... --- name: same_mask body: | bb.0: liveins: $v8, $v9, $v0 ; CHECK-LABEL: name: same_mask ; CHECK: liveins: $v8, $v9, $v0 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %pt:vr = COPY $v8 ; CHECK-NEXT: %false:vrnov0 = COPY $v9 ; CHECK-NEXT: %mask:vmv0 = COPY $v0 ; CHECK-NEXT: %true:vrnov0 = PseudoVADD_VV_M1_MASK %false, $noreg, $noreg, %mask, 8 /* vl */, 5 /* e32 */, 0 /* tu, mu */ ; CHECK-NEXT: %x:vr = PseudoVMV_V_V_M1 %pt, %true, 4 /* vl */, 5 /* e32 */, 0 /* tu, mu */ %pt:vrnov0 = COPY $v8 %false:vrnov0 = COPY $v9 %mask:vmv0 = COPY $v0 %true:vrnov0 = PseudoVADD_VV_M1_MASK %false, $noreg, $noreg, %mask, 8, 5 /* e32 */, 0 /* tu, mu */ %x:vrnov0 = PseudoVMERGE_VVM_M1 %pt, %false, %true, %mask, 4, 5 /* e32 */ ... --- # Shouldn't be converted because false operands are different name: same_mask_different_false body: | bb.0: liveins: $v8, $v9, $v0 ; CHECK-LABEL: name: same_mask_different_false ; CHECK: liveins: $v8, $v9, $v0 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %pt:vrnov0 = COPY $v8 ; CHECK-NEXT: %false:vrnov0 = COPY $v9 ; CHECK-NEXT: %mask:vmv0 = COPY $v0 ; CHECK-NEXT: %true:vrnov0 = PseudoVADD_VV_M1_MASK %pt, $noreg, $noreg, %mask, 4 /* vl */, 5 /* e32 */, 0 /* tu, mu */ ; CHECK-NEXT: %x:vrnov0 = PseudoVMERGE_VVM_M1 %pt, %false, %true, %mask, 8 /* vl */, 5 /* e32 */ %pt:vrnov0 = COPY $v8 %false:vrnov0 = COPY $v9 %mask:vmv0 = COPY $v0 %true:vrnov0 = PseudoVADD_VV_M1_MASK %pt, $noreg, $noreg, %mask, 4, 5 /* e32 */, 0 /* tu, mu */ %x:vrnov0 = PseudoVMERGE_VVM_M1 %pt, %false, %true, %mask, 8, 5 /* e32 */ ... --- # Shouldn't be converted because EEWs are different name: same_mask_different_eew body: | bb.0: liveins: $v8, $v9, $v0 ; CHECK-LABEL: name: same_mask_different_eew ; CHECK: liveins: $v8, $v9, $v0 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %pt:vrnov0 = COPY $v8 ; CHECK-NEXT: %false:vrnov0 = COPY $v9 ; CHECK-NEXT: %mask:vmv0 = COPY $v0 ; CHECK-NEXT: %true:vrnov0 = PseudoVADD_VV_M1_MASK %false, $noreg, $noreg, %mask, 4 /* vl */, 4 /* e16 */, 0 /* tu, mu */ ; CHECK-NEXT: %x:vrnov0 = PseudoVMERGE_VVM_M1 %pt, %false, %true, %mask, 8 /* vl */, 5 /* e32 */ %pt:vrnov0 = COPY $v8 %false:vrnov0 = COPY $v9 %mask:vmv0 = COPY $v0 %true:vrnov0 = PseudoVADD_VV_M1_MASK %false, $noreg, $noreg, %mask, 4, 4 /* e16 */, 0 /* tu, mu */ %x:vrnov0 = PseudoVMERGE_VVM_M1 %pt, %false, %true, %mask, 8, 5 /* e32 */ ... --- name: same_mask_undef_truepassthru body: | bb.0: liveins: $v8, $v0 ; CHECK-LABEL: name: same_mask_undef_truepassthru ; CHECK: liveins: $v8, $v0 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %false:vrnov0 = COPY $v8 ; CHECK-NEXT: %mask:vmv0 = COPY $v0 ; CHECK-NEXT: %true:vrnov0 = PseudoVADD_VV_M1_MASK %false, $noreg, $noreg, %mask, 4 /* vl */, 5 /* e32 */, 1 /* ta, mu */ %false:vrnov0 = COPY $v8 %mask:vmv0 = COPY $v0 %true:vrnov0 = PseudoVADD_VV_M1_MASK $noreg, $noreg, $noreg, %mask, 4, 5 /* e32 */, 0 /* tu, mu */ %x:vrnov0 = PseudoVMERGE_VVM_M1 $noreg, %false, %true, %mask, 4, 5 /* e32 */ ... --- # Shouldn't be converted because true is in a different block name: same_mask_diff_blocks body: | ; CHECK-LABEL: name: same_mask_diff_blocks ; CHECK: bb.0: ; CHECK-NEXT: successors: %bb.1(0x80000000) ; CHECK-NEXT: liveins: $v8, $v0 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %false:vrnov0 = COPY $v8 ; CHECK-NEXT: %mask:vmv0 = COPY $v0 ; CHECK-NEXT: %true:vrnov0 = PseudoVADD_VV_M1_MASK $noreg, $noreg, $noreg, %mask, 4 /* vl */, 5 /* e32 */, 0 /* tu, mu */ ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: [[PseudoVMERGE_VVM_M1_:%[0-9]+]]:vrnov0 = PseudoVMERGE_VVM_M1 $noreg, %false, %true, %mask, 4 /* vl */, 5 /* e32 */ bb.0: liveins: $v8, $v0 %false:vrnov0 = COPY $v8 %mask:vmv0 = COPY $v0 %true:vrnov0 = PseudoVADD_VV_M1_MASK $noreg, $noreg, $noreg, %mask, 4, 5 /* e32 */, 0 /* tu, mu */ bb.1: %5:vrnov0 = PseudoVMERGE_VVM_M1 $noreg, %false, %true, %mask, 4, 5 /* e32 */ ... --- # Shouldn't be converted because vmerge adds back in elements from false past avl that would be lost if we converted to vmv.v.v name: preserve_false body: | bb.0: liveins: $v8, $v9, $v0, $x8, $x9 ; CHECK-LABEL: name: preserve_false ; CHECK: liveins: $v8, $v9, $v0, $x8, $x9 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %pt:vrnov0 = COPY $v8 ; CHECK-NEXT: %false:vrnov0 = COPY $v9 ; CHECK-NEXT: %mask:vmv0 = COPY $v0 ; CHECK-NEXT: %avl1:gprnox0 = COPY $x8 ; CHECK-NEXT: %avl2:gprnox0 = COPY $x9 ; CHECK-NEXT: %true:vrnov0 = PseudoVADD_VV_M1_MASK $noreg, $noreg, $noreg, %mask, %avl1 /* vl */, 5 /* e32 */, 3 /* ta, ma */ ; CHECK-NEXT: [[PseudoVMERGE_VVM_M1_:%[0-9]+]]:vrnov0 = PseudoVMERGE_VVM_M1 %pt, %false, %true, %mask, %avl2 /* vl */, 5 /* e32 */ %pt:vrnov0 = COPY $v8 %false:vrnov0 = COPY $v9 %mask:vmv0 = COPY $v0 %avl1:gprnox0 = COPY $x8 %avl2:gprnox0 = COPY $x9 %true:vrnov0 = PseudoVADD_VV_M1_MASK $noreg, $noreg, $noreg, %mask, %avl1, 5 /* e32 */, 3 /* ta, ma */ %5:vrnov0 = PseudoVMERGE_VVM_M1 %pt, %false, %true, %mask, %avl2, 5 /* e32 */ ... --- # But we can convert this one because vmerge's avl being <= true's means we don't lose any false elements past avl. name: preserve_false_avl_known_le body: | bb.0: liveins: $v8, $v9, $v0 ; CHECK-LABEL: name: preserve_false_avl_known_le ; CHECK: liveins: $v8, $v9, $v0 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %pt:vr = COPY $v8 ; CHECK-NEXT: %false:vrnov0 = COPY $v9 ; CHECK-NEXT: %mask:vmv0 = COPY $v0 ; CHECK-NEXT: %true:vrnov0 = PseudoVADD_VV_M1_MASK %false, $noreg, $noreg, %mask, 2 /* vl */, 5 /* e32 */, 1 /* ta, mu */ ; CHECK-NEXT: [[PseudoVMV_V_V_M1_:%[0-9]+]]:vr = PseudoVMV_V_V_M1 %pt, %true, 1 /* vl */, 5 /* e32 */, 0 /* tu, mu */ %pt:vrnov0 = COPY $v8 %false:vrnov0 = COPY $v9 %mask:vmv0 = COPY $v0 %true:vrnov0 = PseudoVADD_VV_M1_MASK $noreg, $noreg, $noreg, %mask, 2, 5 /* e32 */, 3 /* ta, ma */ %5:vrnov0 = PseudoVMERGE_VVM_M1 %pt, %false, %true, %mask, 1, 5 /* e32 */ ... --- # Can convert because False == Passthru and True's tail policy is TU, # so True's tail lanes preserve passthru (= False = Passthru). name: same_mask_false_eq_passthru_true_tu body: | bb.0: liveins: $v8, $v0, $x8, $x9 ; CHECK-LABEL: name: same_mask_false_eq_passthru_true_tu ; CHECK: liveins: $v8, $v0, $x8, $x9 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %false:vrnov0 = COPY $v8 ; CHECK-NEXT: %mask:vmv0 = COPY $v0 ; CHECK-NEXT: %avl1:gprnox0 = COPY $x8 ; CHECK-NEXT: %avl2:gprnox0 = COPY $x9 ; CHECK-NEXT: %true:vrnov0 = PseudoVADD_VV_M1_MASK %false, $noreg, $noreg, %mask, %avl1 /* vl */, 5 /* e32 */, 0 /* tu, mu */ ; CHECK-NEXT: [[PseudoVMV_V_V_M1_:%[0-9]+]]:vr = PseudoVMV_V_V_M1 %false, %true, %avl2 /* vl */, 5 /* e32 */, 0 /* tu, mu */ %false:vrnov0 = COPY $v8 %mask:vmv0 = COPY $v0 %avl1:gprnox0 = COPY $x8 %avl2:gprnox0 = COPY $x9 %true:vrnov0 = PseudoVADD_VV_M1_MASK %false, $noreg, $noreg, %mask, %avl1, 5 /* e32 */, 0 /* tu, mu */ %5:vrnov0 = PseudoVMERGE_VVM_M1 %false, %false, %true, %mask, %avl2, 5 /* e32 */ ... --- # Shouldn't be converted because True's tail policy is TA, so tail lanes # past TrueVL could be agnostic, even though False == Passthru. name: same_mask_false_eq_passthru_true_ta body: | bb.0: liveins: $v8, $v0, $x8, $x9 ; CHECK-LABEL: name: same_mask_false_eq_passthru_true_ta ; CHECK: liveins: $v8, $v0, $x8, $x9 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %false:vrnov0 = COPY $v8 ; CHECK-NEXT: %mask:vmv0 = COPY $v0 ; CHECK-NEXT: %avl1:gprnox0 = COPY $x8 ; CHECK-NEXT: %avl2:gprnox0 = COPY $x9 ; CHECK-NEXT: %true:vrnov0 = PseudoVADD_VV_M1_MASK %false, $noreg, $noreg, %mask, %avl1 /* vl */, 5 /* e32 */, 1 /* ta, mu */ ; CHECK-NEXT: [[PseudoVMERGE_VVM_M1_:%[0-9]+]]:vrnov0 = PseudoVMERGE_VVM_M1 %false, %false, %true, %mask, %avl2 /* vl */, 5 /* e32 */ %false:vrnov0 = COPY $v8 %mask:vmv0 = COPY $v0 %avl1:gprnox0 = COPY $x8 %avl2:gprnox0 = COPY $x9 %true:vrnov0 = PseudoVADD_VV_M1_MASK %false, $noreg, $noreg, %mask, %avl1, 5 /* e32 */, 1 /* ta, mu */ %5:vrnov0 = PseudoVMERGE_VVM_M1 %false, %false, %true, %mask, %avl2, 5 /* e32 */ ... --- # Shouldn't be converted because False != Passthru, even though True's # tail policy is TU and MIVL could be > TrueVL. name: same_mask_false_ne_passthru_true_tu body: | bb.0: liveins: $v8, $v9, $v0, $x8, $x9 ; CHECK-LABEL: name: same_mask_false_ne_passthru_true_tu ; CHECK: liveins: $v8, $v9, $v0, $x8, $x9 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %pt:vrnov0 = COPY $v8 ; CHECK-NEXT: %false:vrnov0 = COPY $v9 ; CHECK-NEXT: %mask:vmv0 = COPY $v0 ; CHECK-NEXT: %avl1:gprnox0 = COPY $x8 ; CHECK-NEXT: %avl2:gprnox0 = COPY $x9 ; CHECK-NEXT: %true:vrnov0 = PseudoVADD_VV_M1_MASK %false, $noreg, $noreg, %mask, %avl1 /* vl */, 5 /* e32 */, 0 /* tu, mu */ ; CHECK-NEXT: [[PseudoVMERGE_VVM_M1_:%[0-9]+]]:vrnov0 = PseudoVMERGE_VVM_M1 %pt, %false, %true, %mask, %avl2 /* vl */, 5 /* e32 */ %pt:vrnov0 = COPY $v8 %false:vrnov0 = COPY $v9 %mask:vmv0 = COPY $v0 %avl1:gprnox0 = COPY $x8 %avl2:gprnox0 = COPY $x9 %true:vrnov0 = PseudoVADD_VV_M1_MASK %false, $noreg, $noreg, %mask, %avl1, 5 /* e32 */, 0 /* tu, mu */ %5:vrnov0 = PseudoVMERGE_VVM_M1 %pt, %false, %true, %mask, %avl2, 5 /* e32 */ ...