# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=x86_64-linux-gnu -mattr=avx2 -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o -  | FileCheck %s --check-prefixes=AVX2
# RUN: llc -mtriple=x86_64-linux-gnu -mattr=sse2 -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o -  | FileCheck %s --check-prefixes=SSE2
# RUN: llc -mtriple=x86_64-linux-gnu -mattr=avx512f -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o -  | FileCheck %s --check-prefixes=AVX512F


---
name: test_basic_g_implicit_def_v8i64
body: |
  bb.0:
    ; AVX2-LABEL: name: test_basic_g_implicit_def_v8i64
    ; AVX2: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF
    ; AVX2-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s64>) = G_CONCAT_VECTORS [[DEF]](<4 x s64>), [[DEF]](<4 x s64>)
    ; AVX2-NEXT: RET 0, implicit [[CONCAT_VECTORS]](<8 x s64>)
    ;
    ; SSE2-LABEL: name: test_basic_g_implicit_def_v8i64
    ; SSE2: [[DEF:%[0-9]+]]:_(<2 x s64>) = G_IMPLICIT_DEF
    ; SSE2-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s64>) = G_CONCAT_VECTORS [[DEF]](<2 x s64>), [[DEF]](<2 x s64>), [[DEF]](<2 x s64>), [[DEF]](<2 x s64>)
    ; SSE2-NEXT: RET 0, implicit [[CONCAT_VECTORS]](<8 x s64>)
    ;
    ; AVX512F-LABEL: name: test_basic_g_implicit_def_v8i64
    ; AVX512F: [[DEF:%[0-9]+]]:_(<8 x s64>) = G_IMPLICIT_DEF
    ; AVX512F-NEXT: RET 0, implicit [[DEF]](<8 x s64>)
    %0:_(<8 x s64>) = G_IMPLICIT_DEF
    RET 0, implicit %0
...

---
name: test_g_implicit_def_cample_size
body: |
  bb.1:
    ; AVX2-LABEL: name: test_g_implicit_def_cample_size
    ; AVX2: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
    ; AVX2-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<5 x s64>) = G_BUILD_VECTOR [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64)
    ; AVX2-NEXT: [[TRUNC:%[0-9]+]]:_(<5 x s63>) = G_TRUNC [[BUILD_VECTOR]](<5 x s64>)
    ; AVX2-NEXT: RET 0, implicit [[TRUNC]](<5 x s63>)
    ;
    ; SSE2-LABEL: name: test_g_implicit_def_cample_size
    ; SSE2: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
    ; SSE2-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<5 x s64>) = G_BUILD_VECTOR [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64)
    ; SSE2-NEXT: [[TRUNC:%[0-9]+]]:_(<5 x s63>) = G_TRUNC [[BUILD_VECTOR]](<5 x s64>)
    ; SSE2-NEXT: RET 0, implicit [[TRUNC]](<5 x s63>)
    ;
    ; AVX512F-LABEL: name: test_g_implicit_def_cample_size
    ; AVX512F: [[CONSTANT_POOL:%[0-9]+]]:_(p0) = G_CONSTANT_POOL %const.0
    ; AVX512F-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[CONSTANT_POOL]](p0) :: (load (s64) from constant-pool, align 64)
    ; AVX512F-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
    ; AVX512F-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[CONSTANT_POOL]], [[C]](s64)
    ; AVX512F-NEXT: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p0) :: (load (s64) from constant-pool + 8, basealign 64)
    ; AVX512F-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
    ; AVX512F-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[CONSTANT_POOL]], [[C1]](s64)
    ; AVX512F-NEXT: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD1]](p0) :: (load (s64) from constant-pool + 16, align 16, basealign 64)
    ; AVX512F-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 24
    ; AVX512F-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[CONSTANT_POOL]], [[C2]](s64)
    ; AVX512F-NEXT: [[LOAD3:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD2]](p0) :: (load (s64) from constant-pool + 24, basealign 64)
    ; AVX512F-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
    ; AVX512F-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[CONSTANT_POOL]], [[C3]](s64)
    ; AVX512F-NEXT: [[LOAD4:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD3]](p0) :: (load (s64) from constant-pool + 32, align 32, basealign 64)
    ; AVX512F-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<5 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64), [[LOAD2]](s64), [[LOAD3]](s64), [[LOAD4]](s64)
    ; AVX512F-NEXT: [[TRUNC:%[0-9]+]]:_(<5 x s63>) = G_TRUNC [[BUILD_VECTOR]](<5 x s64>)
    ; AVX512F-NEXT: RET 0, implicit [[TRUNC]](<5 x s63>)
    %0:_(<5 x s63>) = G_IMPLICIT_DEF
    RET 0, implicit %0
...