//===----------------------------------------------------------------------===// // // Part of libcu++, the C++ Standard Library for your entire system, // under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. // //===----------------------------------------------------------------------===// // MIT License // // Modifications Copyright (C) 2025 Advanced Micro Devices, Inc. All rights reserved. // // Permission is hereby granted, free of charge, to any person obtaining a copy // of this software and associated documentation files (the "Software"), to deal // in the Software without restriction, including without limitation the rights // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell // copies of the Software, and to permit persons to whom the Software is // furnished to do so, subject to the following conditions: // // The above copyright notice and this permission notice shall be included in all // copies or substantial portions of the Software. // // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE // SOFTWARE. #ifndef _LIBCUDACXX___CMATH_FPCLASSIFY_H #define _LIBCUDACXX___CMATH_FPCLASSIFY_H #include #if defined(_CCCL_IMPLICIT_SYSTEM_HEADER_GCC) # pragma GCC system_header #elif defined(_CCCL_IMPLICIT_SYSTEM_HEADER_CLANG) # pragma clang system_header #elif defined(_CCCL_IMPLICIT_SYSTEM_HEADER_MSVC) # pragma system_header #endif // no system header #include #include #include #include #include #include #include // MSVC and clang cuda need the host side functions included #if _CCCL_COMPILER(MSVC) || _CCCL_CUDA_COMPILER(CLANG) # include #endif // _CCCL_COMPILER(MSVC) || _CCCL_CUDA_COMPILER(CLANG) #if _CCCL_COMPILER(NVRTC) || defined(_CCCL_COMPILER_HIPRTC) # ifndef FP_NAN # define FP_NAN 0 # endif // ! FP_NAN # ifndef FP_INFINITE # define FP_INFINITE 1 # endif // ! FP_INFINITE # ifndef FP_ZERO # define FP_ZERO 2 # endif // ! FP_ZERO # ifndef FP_SUBNORMAL # define FP_SUBNORMAL 3 # endif // ! FP_SUBNORMAL # ifndef FP_NORMAL # define FP_NORMAL 4 # endif // ! FP_NORMAL #else // ^^^ _CCCL_COMPILER(NVRTC) ^^^ ^/ vvv !_CCCL_COMPILER(NVRTC) vvv # include #endif // !_CCCL_COMPILER(NVRTC) _LIBCUDACXX_BEGIN_NAMESPACE_STD template _CCCL_NODISCARD _LIBCUDACXX_HIDE_FROM_ABI constexpr int __fpclassify_impl(_Tp __x) noexcept { static_assert(numeric_limits<_Tp>::has_denorm, "The type must have denorm support"); if constexpr (numeric_limits<_Tp>::has_quiet_NaN || numeric_limits<_Tp>::has_signaling_NaN) { if (_CUDA_VSTD::isnan(__x)) { return FP_NAN; } } if constexpr (numeric_limits<_Tp>::has_infinity) { if (_CUDA_VSTD::isinf(__x)) { return FP_INFINITE; } } if constexpr (_CCCL_TRAIT(is_floating_point, _Tp)) { if (__x > -numeric_limits<_Tp>::min() && __x < numeric_limits<_Tp>::min()) { return (__x == _Tp{}) ? FP_ZERO : FP_SUBNORMAL; } return FP_NORMAL; } else { const auto __storage = _CUDA_VSTD::__fp_get_storage(__x); if ((__storage & __fp_exp_mask_v<_Tp>) == 0) { return (__storage & __fp_mant_mask_v<_Tp>) ? FP_SUBNORMAL : FP_ZERO; } return FP_NORMAL; } } _CCCL_NODISCARD _LIBCUDACXX_HIDE_FROM_ABI constexpr int fpclassify(float __x) noexcept { #if defined(_CCCL_BUILTIN_FPCLASSIFY) return _CCCL_BUILTIN_FPCLASSIFY(FP_NAN, FP_INFINITE, FP_NORMAL, FP_SUBNORMAL, FP_ZERO, __x); #else // ^^^ _CCCL_BUILTIN_FPCLASSIFY ^^^ / vvv !_CCCL_BUILTIN_FPCLASSIFY vvv if (!_CUDA_VSTD::__cccl_default_is_constant_evaluated()) { NV_IF_TARGET_LIBHIPCXX(NV_IS_HOST_LIBHIPCXX, (return ::fpclassify(__x);)) } return _CUDA_VSTD::__fpclassify_impl(__x); #endif // !_CCCL_BUILTIN_FPCLASSIFY } _CCCL_NODISCARD _LIBCUDACXX_HIDE_FROM_ABI constexpr int fpclassify(double __x) noexcept { #if defined(_CCCL_BUILTIN_FPCLASSIFY) return _CCCL_BUILTIN_FPCLASSIFY(FP_NAN, FP_INFINITE, FP_NORMAL, FP_SUBNORMAL, FP_ZERO, __x); #else // ^^^ _CCCL_BUILTIN_FPCLASSIFY ^^^ / vvv !_CCCL_BUILTIN_FPCLASSIFY vvv if (!_CUDA_VSTD::__cccl_default_is_constant_evaluated()) { NV_IF_TARGET_LIBHIPCXX(NV_IS_HOST_LIBHIPCXX, (return ::fpclassify(__x);)) } return _CUDA_VSTD::__fpclassify_impl(__x); #endif // !_CCCL_BUILTIN_FPCLASSIFY } #if _CCCL_HAS_LONG_DOUBLE() _CCCL_NODISCARD _LIBCUDACXX_HIDE_FROM_ABI constexpr int fpclassify(long double __x) noexcept { # if defined(_CCCL_BUILTIN_FPCLASSIFY) return _CCCL_BUILTIN_FPCLASSIFY(FP_NAN, FP_INFINITE, FP_NORMAL, FP_SUBNORMAL, FP_ZERO, __x); # else // ^^^ _CCCL_BUILTIN_SIGNBIT ^^^ / vvv !_CCCL_BUILTIN_SIGNBIT vvv if (!_CUDA_VSTD::__cccl_default_is_constant_evaluated()) { NV_IF_TARGET_LIBHIPCXX(NV_IS_HOST_LIBHIPCXX, (return ::fpclassify(__x);)) } return _CUDA_VSTD::__fpclassify_impl(__x); # endif // !_CCCL_BUILTIN_SIGNBIT } #endif // _CCCL_HAS_LONG_DOUBLE() #if _CCCL_HAS_NVFP16() _CCCL_NODISCARD _LIBCUDACXX_HIDE_FROM_ABI constexpr int fpclassify(__half __x) noexcept { return _CUDA_VSTD::__fpclassify_impl(__x); } #endif // _CCCL_HAS_NVFP16() #if _CCCL_HAS_NVBF16() _CCCL_NODISCARD _LIBCUDACXX_HIDE_FROM_ABI constexpr int fpclassify(__hip_bfloat16 __x) noexcept { return _CUDA_VSTD::__fpclassify_impl(__x); } #endif // _CCCL_HAS_NVBF16() #if _CCCL_HAS_NVFP8_E4M3() _CCCL_NODISCARD _LIBCUDACXX_HIDE_FROM_ABI constexpr int fpclassify(__nv_fp8_e4m3 __x) noexcept { return _CUDA_VSTD::__fpclassify_impl(__x); } #endif // _CCCL_HAS_NVFP8_E4M3() #if _CCCL_HAS_NVFP8_E5M2() _CCCL_NODISCARD _LIBCUDACXX_HIDE_FROM_ABI constexpr int fpclassify(__nv_fp8_e5m2 __x) noexcept { return _CUDA_VSTD::__fpclassify_impl(__x); } #endif // _CCCL_HAS_NVFP8_E5M2() #if _CCCL_HAS_NVFP8_E8M0() _CCCL_NODISCARD _LIBCUDACXX_HIDE_FROM_ABI constexpr int fpclassify(__nv_fp8_e8m0 __x) noexcept { return ((__x.__x & __fp_exp_mask_v<__nv_fp8_e8m0>) == __fp_exp_mask_v<__nv_fp8_e8m0>) ? FP_NAN : FP_NORMAL; } #endif // _CCCL_HAS_NVFP8_E8M0() #if _CCCL_HAS_NVFP6_E2M3() _CCCL_NODISCARD _LIBCUDACXX_HIDE_FROM_ABI constexpr int fpclassify(__nv_fp6_e2m3 __x) noexcept { return _CUDA_VSTD::__fpclassify_impl(__x); } #endif // _CCCL_HAS_NVFP6_E2M3() #if _CCCL_HAS_NVFP6_E3M2() _CCCL_NODISCARD _LIBCUDACXX_HIDE_FROM_ABI constexpr int fpclassify(__nv_fp6_e3m2 __x) noexcept { return _CUDA_VSTD::__fpclassify_impl(__x); } #endif // _CCCL_HAS_NVFP6_E3M2() #if _CCCL_HAS_NVFP4_E2M1() _CCCL_NODISCARD _LIBCUDACXX_HIDE_FROM_ABI constexpr int fpclassify(__nv_fp4_e2m1 __x) noexcept { return _CUDA_VSTD::__fpclassify_impl(__x); } #endif // _CCCL_HAS_NVFP4_E2M1() _CCCL_TEMPLATE(class _Tp) _CCCL_REQUIRES(_CCCL_TRAIT(is_integral, _Tp)) _CCCL_NODISCARD _LIBCUDACXX_HIDE_FROM_ABI constexpr int fpclassify(_Tp __x) noexcept { return (__x == 0) ? FP_ZERO : FP_NORMAL; } _LIBCUDACXX_END_NAMESPACE_STD #endif // _LIBCUDACXX___CMATH_FPCLASSIFY_H