# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK

---
name:            test_neg_one_f16_sgpr
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $sgpr0

    ; CHECK-LABEL: name: test_neg_one_f16_sgpr
    ; CHECK: liveins: $sgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr0
    ; CHECK-NEXT: %x:_(s16) = G_TRUNC [[COPY]](s32)
    ; CHECK-NEXT: %d:_(s16) = G_FNEG %x
    ; CHECK-NEXT: %ext:_(s32) = G_ANYEXT %d(s16)
    ; CHECK-NEXT: $sgpr0 = COPY %ext(s32)
    %0:_(s32) = COPY $sgpr0
    %x:_(s16) = G_TRUNC %0:_(s32)
    %y:_(s16) = G_FCONSTANT half -1.0
    %d:_(s16) = G_FMUL %x, %y
    %ext:_(s32) = G_ANYEXT %d:_(s16)
    $sgpr0 = COPY %ext

...

---
name:            test_neg_one_f32_sgpr
body:             |
  bb.0:
    liveins: $sgpr0

    ; CHECK-LABEL: name: test_neg_one_f32_sgpr
    ; CHECK: liveins: $sgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr0
    ; CHECK-NEXT: [[FNEG:%[0-9]+]]:_(s32) = G_FNEG [[COPY]]
    ; CHECK-NEXT: $sgpr0 = COPY [[FNEG]](s32)
    %0:_(s32) = COPY $sgpr0
    %1:_(s32) = G_FCONSTANT float -1.0
    %2:_(s32) = G_FMUL %0, %1
    $sgpr0 = COPY %2(s32)

...

---
name:            test_neg_one_f64_sgpr
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $sgpr0

    ; CHECK-LABEL: name: test_neg_one_f64_sgpr
    ; CHECK: liveins: $sgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr0
    ; CHECK-NEXT: %x:_(s64) = G_ANYEXT [[COPY]](s32)
    ; CHECK-NEXT: %d:_(s64) = G_FNEG %x
    ; CHECK-NEXT: %ext:_(s32) = G_TRUNC %d(s64)
    ; CHECK-NEXT: $sgpr0 = COPY %ext(s32)
    %0:_(s32) = COPY $sgpr0
    %x:_(s64) = G_ANYEXT %0:_(s32)
    %y:_(s64) = G_FCONSTANT double -1.0
    %d:_(s64) = G_FMUL %x, %y
    %ext:_(s32) = G_TRUNC %d:_(s64)
    $sgpr0 = COPY %ext

...

---
name:            test_neg_ten_f32_sgpr
body:             |
  bb.0:
    liveins: $sgpr0

    ; CHECK-LABEL: name: test_neg_ten_f32_sgpr
    ; CHECK: liveins: $sgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float -1.000000e+01
    ; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[COPY]], [[C]]
    ; CHECK-NEXT: $sgpr0 = COPY [[FMUL]](s32)
    %0:_(s32) = COPY $sgpr0
    %1:_(s32) = G_FCONSTANT float -10.0
    %2:_(s32) = G_FMUL %0, %1
    $sgpr0 = COPY %2(s32)

...

---
name:            test_neg_fract_f32_sgpr
body:             |
  bb.0:
    liveins: $sgpr0

    ; CHECK-LABEL: name: test_neg_fract_f32_sgpr
    ; CHECK: liveins: $sgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float -5.000000e-01
    ; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[COPY]], [[C]]
    ; CHECK-NEXT: $sgpr0 = COPY [[FMUL]](s32)
    %0:_(s32) = COPY $sgpr0
    %1:_(s32) = G_FCONSTANT float -0.5
    %2:_(s32) = G_FMUL %0, %1
    $sgpr0 = COPY %2(s32)

...

---
name:            test_neg_one_f16_vgpr
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0

    ; CHECK-LABEL: name: test_neg_one_f16_vgpr
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: %x:_(s16) = G_TRUNC [[COPY]](s32)
    ; CHECK-NEXT: %d:_(s16) = G_FNEG %x
    ; CHECK-NEXT: %ext:_(s32) = G_ANYEXT %d(s16)
    ; CHECK-NEXT: $vgpr0 = COPY %ext(s32)
    %0:_(s32) = COPY $vgpr0
    %x:_(s16) = G_TRUNC %0:_(s32)
    %y:_(s16) = G_FCONSTANT half -1.0
    %d:_(s16) = G_FMUL %x, %y
    %ext:_(s32) = G_ANYEXT %d:_(s16)
    $vgpr0 = COPY %ext

...

---
name:            test_neg_one_f32_vgpr
body:             |
  bb.0:
    liveins: $vgpr0

    ; CHECK-LABEL: name: test_neg_one_f32_vgpr
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: [[FNEG:%[0-9]+]]:_(s32) = G_FNEG [[COPY]]
    ; CHECK-NEXT: $vgpr0 = COPY [[FNEG]](s32)
    %0:_(s32) = COPY $vgpr0
    %1:_(s32) = G_FCONSTANT float -1.0
    %2:_(s32) = G_FMUL %0, %1
    $vgpr0 = COPY %2(s32)

...

---
name:            test_neg_one_f64_vgpr
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0

    ; CHECK-LABEL: name: test_neg_one_f64_vgpr
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: %x:_(s64) = G_ANYEXT [[COPY]](s32)
    ; CHECK-NEXT: %d:_(s64) = G_FNEG %x
    ; CHECK-NEXT: %ext:_(s32) = G_TRUNC %d(s64)
    ; CHECK-NEXT: $vgpr0 = COPY %ext(s32)
    %0:_(s32) = COPY $vgpr0
    %x:_(s64) = G_ANYEXT %0:_(s32)
    %y:_(s64) = G_FCONSTANT double -1.0
    %d:_(s64) = G_FMUL %x, %y
    %ext:_(s32) = G_TRUNC %d:_(s64)
    $vgpr0 = COPY %ext

...

---
name:            test_neg_ten_f32_vgpr
body:             |
  bb.0:
    liveins: $vgpr0

    ; CHECK-LABEL: name: test_neg_ten_f32_vgpr
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float -1.000000e+01
    ; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[COPY]], [[C]]
    ; CHECK-NEXT: $vgpr0 = COPY [[FMUL]](s32)
    %0:_(s32) = COPY $vgpr0
    %1:_(s32) = G_FCONSTANT float -10.0
    %2:_(s32) = G_FMUL %0, %1
    $vgpr0 = COPY %2(s32)

...

---
name:            test_neg_fract_f32_vgpr
body:             |
  bb.0:
    liveins: $vgpr0

    ; CHECK-LABEL: name: test_neg_fract_f32_vgpr
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float -5.000000e-01
    ; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[COPY]], [[C]]
    ; CHECK-NEXT: $vgpr0 = COPY [[FMUL]](s32)
    %0:_(s32) = COPY $vgpr0
    %1:_(s32) = G_FCONSTANT float -0.5
    %2:_(s32) = G_FMUL %0, %1
    $vgpr0 = COPY %2(s32)

...