derek.holloway
7502bf64a4
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136 lines
3.8 KiB
ArmAsm
136 lines
3.8 KiB
ArmAsm
; Empty Kernel test1_v3 code-object-v3 source
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.text
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.amdgcn_target "amdgcn-amd-amdhsa--gfx803"
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.protected test1_v3 ; -- Begin function test1_v3
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.globl test1_v3
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.p2align 8
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.type test1_v3,@function
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test1_v3: ; @test1_v3
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test1_v3$local:
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; %bb.0: ; %entry
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s_mov_b32 s33, 0
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s_endpgm
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.section .rodata,#alloc
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.p2align 6
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.amdhsa_kernel test1_v3
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.amdhsa_group_segment_fixed_size 0
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.amdhsa_private_segment_fixed_size 0
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.amdhsa_user_sgpr_private_segment_buffer 1
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.amdhsa_user_sgpr_dispatch_ptr 0
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.amdhsa_user_sgpr_queue_ptr 0
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.amdhsa_user_sgpr_kernarg_segment_ptr 0
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.amdhsa_user_sgpr_dispatch_id 0
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.amdhsa_user_sgpr_flat_scratch_init 0
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.amdhsa_user_sgpr_private_segment_size 0
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.amdhsa_system_sgpr_private_segment_wavefront_offset 0
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.amdhsa_system_sgpr_workgroup_id_x 1
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.amdhsa_system_sgpr_workgroup_id_y 0
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.amdhsa_system_sgpr_workgroup_id_z 0
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.amdhsa_system_sgpr_workgroup_info 0
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.amdhsa_system_vgpr_workitem_id 0
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.amdhsa_next_free_vgpr 1
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.amdhsa_next_free_sgpr 34
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.amdhsa_reserve_vcc 0
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.amdhsa_reserve_flat_scratch 0
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.amdhsa_float_round_mode_32 0
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.amdhsa_float_round_mode_16_64 0
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.amdhsa_float_denorm_mode_32 0
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.amdhsa_float_denorm_mode_16_64 3
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.amdhsa_dx10_clamp 1
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.amdhsa_ieee_mode 1
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.amdhsa_exception_fp_ieee_invalid_op 0
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.amdhsa_exception_fp_denorm_src 0
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.amdhsa_exception_fp_ieee_div_zero 0
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.amdhsa_exception_fp_ieee_overflow 0
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.amdhsa_exception_fp_ieee_underflow 0
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.amdhsa_exception_fp_ieee_inexact 0
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.amdhsa_exception_int_div_zero 0
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.end_amdhsa_kernel
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.text
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.Lfunc_end0:
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.size test1_v3, .Lfunc_end0-test1_v3
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; -- End function
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.section .AMDGPU.csdata
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; Kernel info:
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; codeLenInByte = 8
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; NumSgprs: 34
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; NumVgprs: 0
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; ScratchSize: 0
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; MemoryBound: 0
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; FloatMode: 192
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; IeeeMode: 1
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; LDSByteSize: 0 bytes/workgroup (compile time only)
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; SGPRBlocks: 4
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; VGPRBlocks: 0
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; NumSGPRsForWavesPerEU: 34
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; NumVGPRsForWavesPerEU: 1
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; Occupancy: 10
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; WaveLimiterHint : 0
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; COMPUTE_PGM_RSRC2:USER_SGPR: 4
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; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
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; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
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; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
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; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
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; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
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.ident "clang version 11.0.0 (https://github.com/llvm/llvm-project.git 20629ca949cddde9f7e41a4b9e8539a970615feb)"
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.section ".note.GNU-stack"
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.addrsig
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.amdgpu_metadata
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---
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amdhsa.kernels:
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- .args:
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- .offset: 0
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.size: 8
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.value_kind: hidden_global_offset_x
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.value_type: i64
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- .offset: 8
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.size: 8
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.value_kind: hidden_global_offset_y
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.value_type: i64
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- .offset: 16
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.size: 8
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.value_kind: hidden_global_offset_z
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.value_type: i64
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- .address_space: global
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.offset: 24
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.size: 8
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.value_kind: hidden_none
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.value_type: i8
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- .address_space: global
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.offset: 32
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.size: 8
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.value_kind: hidden_none
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.value_type: i8
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- .address_space: global
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.offset: 40
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.size: 8
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.value_kind: hidden_none
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.value_type: i8
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- .address_space: global
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.offset: 48
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.size: 8
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.value_kind: hidden_multigrid_sync_arg
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.value_type: i8
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.group_segment_fixed_size: 0
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.kernarg_segment_align: 4
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.kernarg_segment_size: 56
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.language: OpenCL C
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.language_version:
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- 2
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- 0
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.max_flat_workgroup_size: 256
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.name: test1_v3
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.private_segment_fixed_size: 0
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.sgpr_count: 34
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.sgpr_spill_count: 0
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.symbol: test1_v3.kd
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.vgpr_count: 0
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.vgpr_spill_count: 0
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.wavefront_size: 64
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amdhsa.version:
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- 1
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- 0
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...
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.end_amdgpu_metadata
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