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75 lines
2.4 KiB
ArmAsm
75 lines
2.4 KiB
ArmAsm
// RUN: %clang %cflags -march=armv8.3-a -mbranch-protection=pac-ret %s %p/../../Inputs/asm_main.c -o %t.exe
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// RUN: llvm-bolt-binary-analysis --scanners=ptrauth-pac-ret %t.exe 2>&1 | FileCheck %s
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// Verify that we can also detect gadgets across basic blocks
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.globl f_crossbb1
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.type f_crossbb1,@function
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f_crossbb1:
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paciasp
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stp x29, x30, [sp, #-16]!
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ldp x29, x30, [sp], #16
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cbnz x0, 1f
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autiasp
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1:
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ret
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.size f_crossbb1, .-f_crossbb1
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// CHECK-LABEL: GS-PAUTH: non-protected ret found in function f_crossbb1, basic block {{[^,]+}}, at address
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// CHECK-NEXT: The instruction is {{[0-9a-f]+}}: ret
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// CHECK-NEXT: The 1 instructions that write to the affected registers after any authentication are:
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// CHECK-NEXT: 1. {{[0-9a-f]+}}: ldp x29, x30, [sp], #0x10
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// A test that checks that the dataflow state tracking across when merging BBs
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// seems to work:
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.globl f_mergebb1
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.type f_mergebb1,@function
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f_mergebb1:
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paciasp
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2:
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stp x29, x30, [sp, #-16]!
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ldp x29, x30, [sp], #16
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sub x0, x0, #1
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cbnz x0, 1f
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autiasp
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b 2b
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1:
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ret
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.size f_mergebb1, .-f_mergebb1
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// CHECK-LABEL: GS-PAUTH: non-protected ret found in function f_mergebb1, basic block {{[^,]+}}, at address
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// CHECK-NEXT: The instruction is {{[0-9a-f]+}}: ret
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// CHECK-NEXT: The 1 instructions that write to the affected registers after any authentication are:
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// CHECK-NEXT: 1. {{[0-9a-f]+}}: ldp x29, x30, [sp], #0x10
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.globl f_shrinkwrapping
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.type f_shrinkwrapping,@function
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f_shrinkwrapping:
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cbz x0, 1f
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paciasp
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stp x29, x30, [sp, #-16]!
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ldp x29, x30, [sp], #16
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autiasp
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1:
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ret
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.size f_shrinkwrapping, .-f_shrinkwrapping
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// CHECK-NOT: f_shrinkwrapping
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.globl f_multi_auth_insts
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.type f_multi_auth_insts,@function
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f_multi_auth_insts:
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paciasp
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stp x29, x30, [sp, #-16]!
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ldp x29, x30, [sp], #16
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cbnz x0, 1f
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autibsp
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b 2f
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1:
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autiasp
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2:
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ret
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.size f_multi_auth_insts, .-f_multi_auth_insts
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// CHECK-NOT: f_multi_auth_insts
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// TODO: also verify that false negatives exist in across-BB gadgets in functions
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// for which bolt cannot reconstruct the call graph.
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