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66 lines
2.9 KiB
Plaintext
66 lines
2.9 KiB
Plaintext
#include "../CodeGenCUDA/Inputs/cuda.h"
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// REQUIRES: amdgpu-registered-target
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// RUN: %clang_cc1 -triple=amdgcn-amd-amdhsa -x hip -fclangir \
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// RUN: -fcuda-is-device -target-cpu gfx900 -emit-cir %s -o %t.cir
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// RUN: FileCheck --check-prefix=CIR %s --input-file=%t.cir
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// RUN: %clang_cc1 -triple=amdgcn-amd-amdhsa -x hip -fclangir \
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// RUN: -fcuda-is-device -target-cpu gfx900 -emit-llvm %s -o %t.cir.ll
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// RUN: FileCheck --check-prefix=LLVM %s --input-file=%t.cir.ll
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// RUN: %clang_cc1 -triple=amdgcn-amd-amdhsa -x hip \
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// RUN: -fcuda-is-device -target-cpu gfx900 -emit-llvm %s -o %t.ll
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// RUN: FileCheck --check-prefix=LLVM %s --input-file=%t.ll
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// Verify that with extra target-features differing from the CPU baseline,
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// only the delta (differing features) is emitted on cir.target-features.
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// RUN: %clang_cc1 -triple=amdgcn-amd-amdhsa -x hip -fclangir \
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// RUN: -fcuda-is-device -target-cpu gfx900 -target-feature +xnack \
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// RUN: -emit-cir %s -o %t-delta.cir
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// RUN: FileCheck --check-prefix=CIR-DELTA %s --input-file=%t-delta.cir
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// RUN: %clang_cc1 -triple=amdgcn-amd-amdhsa -x hip -fclangir \
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// RUN: -fcuda-is-device -target-cpu gfx900 -target-feature +xnack \
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// RUN: -emit-llvm %s -o %t-delta.cir.ll
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// RUN: FileCheck --check-prefix=LLVM-DELTA %s --input-file=%t-delta.cir.ll
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// RUN: %clang_cc1 -triple=amdgcn-amd-amdhsa -x hip \
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// RUN: -fcuda-is-device -target-cpu gfx900 -target-feature +xnack \
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// RUN: -emit-llvm %s -o %t-delta.ll
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// RUN: FileCheck --check-prefix=LLVM-DELTA %s --input-file=%t-delta.ll
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// AMDGPU with gfx900: target-cpu is set, target-features is absent.
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// CIR: cir.func{{.*}} @_Z6kernelv()
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// CIR-SAME: "cir.target-cpu" = "gfx900"
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// CIR-NOT: cir.target-features
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__global__ void kernel() {}
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// CIR: cir.func{{.*}} @_Z9device_fnv()
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// CIR-SAME: "cir.target-cpu" = "gfx900"
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// CIR-NOT: cir.target-features
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__device__ void device_fn() {}
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// LLVM: define{{.*}} void @_Z6kernelv(){{.*}} #[[K_ATTR:[0-9]+]]
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// LLVM: define{{.*}} void @_Z9device_fnv(){{.*}} #[[D_ATTR:[0-9]+]]
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// LLVM-DAG: attributes #[[K_ATTR]] = {{.*}}"target-cpu"="gfx900"
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// LLVM-DAG: attributes #[[D_ATTR]] = {{.*}}"target-cpu"="gfx900"
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// AMDGPU with gfx900 + an extra +xnack feature: only the delta is emitted.
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// CIR-DELTA: cir.func{{.*}} @_Z6kernelv()
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// CIR-DELTA-SAME: "cir.target-cpu" = "gfx900"
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// CIR-DELTA-SAME: "cir.target-features" = "+xnack"
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// CIR-DELTA: cir.func{{.*}} @_Z9device_fnv()
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// CIR-DELTA-SAME: "cir.target-cpu" = "gfx900"
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// CIR-DELTA-SAME: "cir.target-features" = "+xnack"
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// LLVM-DELTA: define{{.*}} void @_Z6kernelv(){{.*}} #[[K_ATTR_D:[0-9]+]]
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// LLVM-DELTA: define{{.*}} void @_Z9device_fnv(){{.*}} #[[D_ATTR_D:[0-9]+]]
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// LLVM-DELTA-DAG: attributes #[[K_ATTR_D]] = {{.*}}"target-cpu"="gfx900"{{.*}}"target-features"="+xnack"
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// LLVM-DELTA-DAG: attributes #[[D_ATTR_D]] = {{.*}}"target-cpu"="gfx900"{{.*}}"target-features"="+xnack"
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