derek.holloway
7502bf64a4
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249 lines
13 KiB
C
249 lines
13 KiB
C
// RUN: %clang_cc1 -fms-extensions -triple x86_64-windows-msvc %s -emit-llvm -o - | FileCheck %s --check-prefix=X64
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// RUN: %clang_cc1 -fms-extensions -triple thumbv7-windows-msvc %s -emit-llvm -o - | FileCheck %s --check-prefix=ARM
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// RUN: %clang_cc1 -fms-extensions -triple aarch64-windows-msvc %s -emit-llvm -o - | FileCheck %s --check-prefix=ARM64 -check-prefix=ARM
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volatile unsigned char sink = 0;
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void test32(long *base, long idx) {
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sink = _bittest(base, idx);
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sink = _bittestandcomplement(base, idx);
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sink = _bittestandreset(base, idx);
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sink = _bittestandset(base, idx);
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sink = _interlockedbittestandreset(base, idx);
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sink = _interlockedbittestandset(base, idx);
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}
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void test64(__int64 *base, __int64 idx) {
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sink = _bittest64(base, idx);
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sink = _bittestandcomplement64(base, idx);
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sink = _bittestandreset64(base, idx);
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sink = _bittestandset64(base, idx);
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sink = _interlockedbittestandreset64(base, idx);
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sink = _interlockedbittestandset64(base, idx);
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}
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#if defined(_M_ARM) || defined(_M_ARM64)
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void test_arm(long *base, long idx) {
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sink = _interlockedbittestandreset_acq(base, idx);
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sink = _interlockedbittestandreset_rel(base, idx);
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sink = _interlockedbittestandreset_nf(base, idx);
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sink = _interlockedbittestandset_acq(base, idx);
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sink = _interlockedbittestandset_rel(base, idx);
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sink = _interlockedbittestandset_nf(base, idx);
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}
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#endif
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#if defined(_M_ARM64)
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void test_arm64(__int64 *base, __int64 idx) {
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sink = _interlockedbittestandreset64_acq(base, idx);
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sink = _interlockedbittestandreset64_rel(base, idx);
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sink = _interlockedbittestandreset64_nf(base, idx);
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sink = _interlockedbittestandset64_acq(base, idx);
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sink = _interlockedbittestandset64_rel(base, idx);
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sink = _interlockedbittestandset64_nf(base, idx);
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}
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#endif
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// X64-LABEL: define dso_local void @test32(ptr noundef %base, i32 noundef %idx)
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// X64: call i8 asm sideeffect "btl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %{{.*}}, i32 {{.*}})
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// X64: call i8 asm sideeffect "btcl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %{{.*}}, i32 {{.*}})
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// X64: call i8 asm sideeffect "btrl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %{{.*}}, i32 {{.*}})
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// X64: call i8 asm sideeffect "btsl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %{{.*}}, i32 {{.*}})
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// X64: call i8 asm sideeffect "lock btrl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %{{.*}}, i32 {{.*}})
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// X64: call i8 asm sideeffect "lock btsl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %{{.*}}, i32 {{.*}})
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// X64-LABEL: define dso_local void @test64(ptr noundef %base, i64 noundef %idx)
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// X64: call i8 asm sideeffect "btq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %{{.*}}, i64 {{.*}})
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// X64: call i8 asm sideeffect "btcq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %{{.*}}, i64 {{.*}})
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// X64: call i8 asm sideeffect "btrq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %{{.*}}, i64 {{.*}})
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// X64: call i8 asm sideeffect "btsq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %{{.*}}, i64 {{.*}})
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// X64: call i8 asm sideeffect "lock btrq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %{{.*}}, i64 {{.*}})
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// X64: call i8 asm sideeffect "lock btsq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(ptr %{{.*}}, i64 {{.*}})
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// ARM-LABEL: define dso_local {{.*}}void @test32(ptr noundef %base, i32 noundef %idx)
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// ARM: %[[IDXHI:[^ ]*]] = ashr i32 %{{.*}}, 3
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// ARM: %[[BYTEADDR:[^ ]*]] = getelementptr inbounds i8, ptr %{{.*}}, i32 %[[IDXHI]]
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// ARM: %[[IDX8:[^ ]*]] = trunc i32 %{{.*}} to i8
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// ARM: %[[IDXLO:[^ ]*]] = and i8 %[[IDX8]], 7
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// ARM: %[[BYTE:[^ ]*]] = load i8, ptr %[[BYTEADDR]], align 1
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// ARM: %[[BYTESHR:[^ ]*]] = lshr i8 %[[BYTE]], %[[IDXLO]]
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// ARM: %[[RES:[^ ]*]] = and i8 %[[BYTESHR]], 1
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// ARM: store volatile i8 %[[RES]], ptr @sink, align 1
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// ARM: %[[IDXHI:[^ ]*]] = ashr i32 %{{.*}}, 3
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// ARM: %[[BYTEADDR:[^ ]*]] = getelementptr inbounds i8, ptr %{{.*}}, i32 %[[IDXHI]]
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// ARM: %[[IDX8:[^ ]*]] = trunc i32 %{{.*}} to i8
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// ARM: %[[IDXLO:[^ ]*]] = and i8 %[[IDX8]], 7
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// ARM: %[[MASK:[^ ]*]] = shl i8 1, %[[IDXLO]]
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// ARM: %[[BYTE:[^ ]*]] = load i8, ptr %[[BYTEADDR]], align 1
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// ARM: %[[NEWBYTE:[^ ]*]] = xor i8 %[[BYTE]], %[[MASK]]
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// ARM: store i8 %[[NEWBYTE]], ptr %[[BYTEADDR]], align 1
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// ARM: %[[BYTESHR:[^ ]*]] = lshr i8 %[[BYTE]], %[[IDXLO]]
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// ARM: %[[RES:[^ ]*]] = and i8 %[[BYTESHR]], 1
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// ARM: store volatile i8 %[[RES]], ptr @sink, align 1
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// ARM: %[[IDXHI:[^ ]*]] = ashr i32 %{{.*}}, 3
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// ARM: %[[BYTEADDR:[^ ]*]] = getelementptr inbounds i8, ptr %{{.*}}, i32 %[[IDXHI]]
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// ARM: %[[IDX8:[^ ]*]] = trunc i32 %{{.*}} to i8
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// ARM: %[[IDXLO:[^ ]*]] = and i8 %[[IDX8]], 7
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// ARM: %[[MASK:[^ ]*]] = shl i8 1, %[[IDXLO]]
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// ARM: %[[BYTE:[^ ]*]] = load i8, ptr %[[BYTEADDR]], align 1
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// ARM: %[[NOTMASK:[^ ]*]] = xor i8 %[[MASK]], -1
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// ARM: %[[NEWBYTE:[^ ]*]] = and i8 %[[BYTE]], %[[NOTMASK]]
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// ARM: store i8 %[[NEWBYTE]], ptr %[[BYTEADDR]], align 1
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// ARM: %[[BYTESHR:[^ ]*]] = lshr i8 %[[BYTE]], %[[IDXLO]]
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// ARM: %[[RES:[^ ]*]] = and i8 %[[BYTESHR]], 1
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// ARM: store volatile i8 %[[RES]], ptr @sink, align 1
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// ARM: %[[IDXHI:[^ ]*]] = ashr i32 %{{.*}}, 3
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// ARM: %[[BYTEADDR:[^ ]*]] = getelementptr inbounds i8, ptr %{{.*}}, i32 %[[IDXHI]]
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// ARM: %[[IDX8:[^ ]*]] = trunc i32 %{{.*}} to i8
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// ARM: %[[IDXLO:[^ ]*]] = and i8 %[[IDX8]], 7
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// ARM: %[[MASK:[^ ]*]] = shl i8 1, %[[IDXLO]]
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// ARM: %[[BYTE:[^ ]*]] = load i8, ptr %[[BYTEADDR]], align 1
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// ARM: %[[NEWBYTE:[^ ]*]] = or i8 %[[BYTE]], %[[MASK]]
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// ARM: store i8 %[[NEWBYTE]], ptr %[[BYTEADDR]], align 1
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// ARM: %[[BYTESHR:[^ ]*]] = lshr i8 %[[BYTE]], %[[IDXLO]]
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// ARM: %[[RES:[^ ]*]] = and i8 %[[BYTESHR]], 1
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// ARM: store volatile i8 %[[RES]], ptr @sink, align 1
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// ARM: %[[IDXHI:[^ ]*]] = ashr i32 %{{.*}}, 3
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// ARM: %[[BYTEADDR:[^ ]*]] = getelementptr inbounds i8, ptr %{{.*}}, i32 %[[IDXHI]]
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// ARM: %[[IDX8:[^ ]*]] = trunc i32 %{{.*}} to i8
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// ARM: %[[IDXLO:[^ ]*]] = and i8 %[[IDX8]], 7
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// ARM: %[[MASK:[^ ]*]] = shl i8 1, %[[IDXLO]]
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// ARM: %[[NOTMASK:[^ ]*]] = xor i8 %[[MASK]], -1
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// ARM: %[[BYTE:[^ ]*]] = atomicrmw and ptr %[[BYTEADDR]], i8 %[[NOTMASK]] seq_cst, align 1
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// ARM: %[[BYTESHR:[^ ]*]] = lshr i8 %[[BYTE]], %[[IDXLO]]
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// ARM: %[[RES:[^ ]*]] = and i8 %[[BYTESHR]], 1
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// ARM: store volatile i8 %[[RES]], ptr @sink, align 1
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// ARM: %[[IDXHI:[^ ]*]] = ashr i32 %{{.*}}, 3
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// ARM: %[[BYTEADDR:[^ ]*]] = getelementptr inbounds i8, ptr %{{.*}}, i32 %[[IDXHI]]
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// ARM: %[[IDX8:[^ ]*]] = trunc i32 %{{.*}} to i8
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// ARM: %[[IDXLO:[^ ]*]] = and i8 %[[IDX8]], 7
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// ARM: %[[MASK:[^ ]*]] = shl i8 1, %[[IDXLO]]
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// ARM: %[[BYTE:[^ ]*]] = atomicrmw or ptr %[[BYTEADDR]], i8 %[[MASK]] seq_cst, align 1
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// ARM: %[[BYTESHR:[^ ]*]] = lshr i8 %[[BYTE]], %[[IDXLO]]
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// ARM: %[[RES:[^ ]*]] = and i8 %[[BYTESHR]], 1
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// ARM: store volatile i8 %[[RES]], ptr @sink, align 1
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// ARM-LABEL: define dso_local {{.*}}void @test64(ptr noundef %base, i64 noundef %idx)
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// ARM: %[[IDXHI:[^ ]*]] = ashr i64 %{{.*}}, 3
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// ARM: %[[BYTEADDR:[^ ]*]] = getelementptr inbounds i8, ptr %{{.*}}, i64 %[[IDXHI]]
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// ARM: %[[IDX8:[^ ]*]] = trunc i64 %{{.*}} to i8
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// ARM: %[[IDXLO:[^ ]*]] = and i8 %[[IDX8]], 7
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// ARM: %[[BYTE:[^ ]*]] = load i8, ptr %[[BYTEADDR]], align 1
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// ARM: %[[BYTESHR:[^ ]*]] = lshr i8 %[[BYTE]], %[[IDXLO]]
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// ARM: %[[RES:[^ ]*]] = and i8 %[[BYTESHR]], 1
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// ARM: store volatile i8 %[[RES]], ptr @sink, align 1
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// ARM: %[[IDXHI:[^ ]*]] = ashr i64 %{{.*}}, 3
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// ARM: %[[BYTEADDR:[^ ]*]] = getelementptr inbounds i8, ptr %{{.*}}, i64 %[[IDXHI]]
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// ARM: %[[IDX8:[^ ]*]] = trunc i64 %{{.*}} to i8
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// ARM: %[[IDXLO:[^ ]*]] = and i8 %[[IDX8]], 7
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// ARM: %[[MASK:[^ ]*]] = shl i8 1, %[[IDXLO]]
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// ARM: %[[BYTE:[^ ]*]] = load i8, ptr %[[BYTEADDR]], align 1
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// ARM: %[[NEWBYTE:[^ ]*]] = xor i8 %[[BYTE]], %[[MASK]]
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// ARM: store i8 %[[NEWBYTE]], ptr %[[BYTEADDR]], align 1
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// ARM: %[[BYTESHR:[^ ]*]] = lshr i8 %[[BYTE]], %[[IDXLO]]
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// ARM: %[[RES:[^ ]*]] = and i8 %[[BYTESHR]], 1
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// ARM: store volatile i8 %[[RES]], ptr @sink, align 1
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// ARM: %[[IDXHI:[^ ]*]] = ashr i64 %{{.*}}, 3
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// ARM: %[[BYTEADDR:[^ ]*]] = getelementptr inbounds i8, ptr %{{.*}}, i64 %[[IDXHI]]
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// ARM: %[[IDX8:[^ ]*]] = trunc i64 %{{.*}} to i8
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// ARM: %[[IDXLO:[^ ]*]] = and i8 %[[IDX8]], 7
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// ARM: %[[MASK:[^ ]*]] = shl i8 1, %[[IDXLO]]
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// ARM: %[[BYTE:[^ ]*]] = load i8, ptr %[[BYTEADDR]], align 1
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// ARM: %[[NOTMASK:[^ ]*]] = xor i8 %[[MASK]], -1
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// ARM: %[[NEWBYTE:[^ ]*]] = and i8 %[[BYTE]], %[[NOTMASK]]
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// ARM: store i8 %[[NEWBYTE]], ptr %[[BYTEADDR]], align 1
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// ARM: %[[BYTESHR:[^ ]*]] = lshr i8 %[[BYTE]], %[[IDXLO]]
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// ARM: %[[RES:[^ ]*]] = and i8 %[[BYTESHR]], 1
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// ARM: store volatile i8 %[[RES]], ptr @sink, align 1
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// ARM: %[[IDXHI:[^ ]*]] = ashr i64 %{{.*}}, 3
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// ARM: %[[BYTEADDR:[^ ]*]] = getelementptr inbounds i8, ptr %{{.*}}, i64 %[[IDXHI]]
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// ARM: %[[IDX8:[^ ]*]] = trunc i64 %{{.*}} to i8
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// ARM: %[[IDXLO:[^ ]*]] = and i8 %[[IDX8]], 7
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// ARM: %[[MASK:[^ ]*]] = shl i8 1, %[[IDXLO]]
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// ARM: %[[BYTE:[^ ]*]] = load i8, ptr %[[BYTEADDR]], align 1
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// ARM: %[[NEWBYTE:[^ ]*]] = or i8 %[[BYTE]], %[[MASK]]
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// ARM: store i8 %[[NEWBYTE]], ptr %[[BYTEADDR]], align 1
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// ARM: %[[BYTESHR:[^ ]*]] = lshr i8 %[[BYTE]], %[[IDXLO]]
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// ARM: %[[RES:[^ ]*]] = and i8 %[[BYTESHR]], 1
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// ARM: store volatile i8 %[[RES]], ptr @sink, align 1
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// ARM: %[[IDXHI:[^ ]*]] = ashr i64 %{{.*}}, 3
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// ARM: %[[BYTEADDR:[^ ]*]] = getelementptr inbounds i8, ptr %{{.*}}, i64 %[[IDXHI]]
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// ARM: %[[IDX8:[^ ]*]] = trunc i64 %{{.*}} to i8
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// ARM: %[[IDXLO:[^ ]*]] = and i8 %[[IDX8]], 7
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// ARM: %[[MASK:[^ ]*]] = shl i8 1, %[[IDXLO]]
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// ARM: %[[NOTMASK:[^ ]*]] = xor i8 %[[MASK]], -1
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// ARM: %[[BYTE:[^ ]*]] = atomicrmw and ptr %[[BYTEADDR]], i8 %[[NOTMASK]] seq_cst, align 1
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// ARM: %[[BYTESHR:[^ ]*]] = lshr i8 %[[BYTE]], %[[IDXLO]]
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// ARM: %[[RES:[^ ]*]] = and i8 %[[BYTESHR]], 1
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// ARM: store volatile i8 %[[RES]], ptr @sink, align 1
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// ARM: %[[IDXHI:[^ ]*]] = ashr i64 %{{.*}}, 3
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// ARM: %[[BYTEADDR:[^ ]*]] = getelementptr inbounds i8, ptr %{{.*}}, i64 %[[IDXHI]]
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// ARM: %[[IDX8:[^ ]*]] = trunc i64 %{{.*}} to i8
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// ARM: %[[IDXLO:[^ ]*]] = and i8 %[[IDX8]], 7
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// ARM: %[[MASK:[^ ]*]] = shl i8 1, %[[IDXLO]]
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// ARM: %[[BYTE:[^ ]*]] = atomicrmw or ptr %[[BYTEADDR]], i8 %[[MASK]] seq_cst, align 1
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// ARM: %[[BYTESHR:[^ ]*]] = lshr i8 %[[BYTE]], %[[IDXLO]]
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// ARM: %[[RES:[^ ]*]] = and i8 %[[BYTESHR]], 1
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// ARM: store volatile i8 %[[RES]], ptr @sink, align 1
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// ARM-LABEL: define dso_local {{.*}}void @test_arm(ptr noundef %base, i32 noundef %idx)
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// ARM: %[[IDXHI:[^ ]*]] = ashr i32 %{{.*}}, 3
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// ARM: %[[BYTEADDR:[^ ]*]] = getelementptr inbounds i8, ptr %{{.*}}, i32 %[[IDXHI]]
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// ARM: %[[IDX8:[^ ]*]] = trunc i32 %{{.*}} to i8
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// ARM: %[[IDXLO:[^ ]*]] = and i8 %[[IDX8]], 7
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// ARM: %[[MASK:[^ ]*]] = shl i8 1, %[[IDXLO]]
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// ARM: %[[NOTMASK:[^ ]*]] = xor i8 %[[MASK]], -1
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// ARM: %[[BYTE:[^ ]*]] = atomicrmw and ptr %[[BYTEADDR]], i8 %[[NOTMASK]] acquire, align 1
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// ARM: %[[BYTESHR:[^ ]*]] = lshr i8 %[[BYTE]], %[[IDXLO]]
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// ARM: %[[RES:[^ ]*]] = and i8 %[[BYTESHR]], 1
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// ARM: store volatile i8 %[[RES]], ptr @sink, align 1
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// Just look for the atomicrmw instructions.
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// ARM: atomicrmw and ptr %{{.*}}, i8 {{.*}} release, align 1
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// ARM: atomicrmw and ptr %{{.*}}, i8 {{.*}} monotonic, align 1
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// ARM: %[[IDXHI:[^ ]*]] = ashr i32 %{{.*}}, 3
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// ARM: %[[BYTEADDR:[^ ]*]] = getelementptr inbounds i8, ptr %{{.*}}, i32 %[[IDXHI]]
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// ARM: %[[IDX8:[^ ]*]] = trunc i32 %{{.*}} to i8
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// ARM: %[[IDXLO:[^ ]*]] = and i8 %[[IDX8]], 7
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// ARM: %[[MASK:[^ ]*]] = shl i8 1, %[[IDXLO]]
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// ARM: %[[BYTE:[^ ]*]] = atomicrmw or ptr %[[BYTEADDR]], i8 %[[MASK]] acquire, align 1
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// ARM: %[[BYTESHR:[^ ]*]] = lshr i8 %[[BYTE]], %[[IDXLO]]
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// ARM: %[[RES:[^ ]*]] = and i8 %[[BYTESHR]], 1
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// ARM: store volatile i8 %[[RES]], ptr @sink, align 1
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// Just look for the atomicrmw instructions.
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// ARM: atomicrmw or ptr %{{.*}}, i8 {{.*}} release, align 1
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// ARM: atomicrmw or ptr %{{.*}}, i8 {{.*}} monotonic, align 1
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// ARM64-LABEL: define dso_local void @test_arm64(ptr noundef %base, i64 noundef %idx)
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// ARM64: %[[IDXHI:[^ ]*]] = ashr i64 %{{.*}}, 3
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// ARM64: %[[BYTEADDR:[^ ]*]] = getelementptr inbounds i8, ptr %{{.*}}, i64 %[[IDXHI]]
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// ARM64: %[[IDX8:[^ ]*]] = trunc i64 %{{.*}} to i8
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// ARM64: %[[IDXLO:[^ ]*]] = and i8 %[[IDX8]], 7
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// ARM64: %[[MASK:[^ ]*]] = shl i8 1, %[[IDXLO]]
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// ARM64: %[[NOTMASK:[^ ]*]] = xor i8 %[[MASK]], -1
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// ARM64: %[[BYTE:[^ ]*]] = atomicrmw and ptr %[[BYTEADDR]], i8 %[[NOTMASK]] acquire, align 1
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// ARM64: %[[BYTESHR:[^ ]*]] = lshr i8 %[[BYTE]], %[[IDXLO]]
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// ARM64: %[[RES:[^ ]*]] = and i8 %[[BYTESHR]], 1
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// ARM64: store volatile i8 %[[RES]], ptr @sink, align 1
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// ARM64: atomicrmw and ptr %{{.*}}, i8 {{.*}} release, align 1
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// ARM64: atomicrmw and ptr %{{.*}}, i8 {{.*}} monotonic, align 1
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// ARM64: %[[IDXHI:[^ ]*]] = ashr i64 %{{.*}}, 3
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// ARM64: %[[BYTEADDR:[^ ]*]] = getelementptr inbounds i8, ptr %{{.*}}, i64 %[[IDXHI]]
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// ARM64: %[[IDX8:[^ ]*]] = trunc i64 %{{.*}} to i8
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// ARM64: %[[IDXLO:[^ ]*]] = and i8 %[[IDX8]], 7
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// ARM64: %[[MASK:[^ ]*]] = shl i8 1, %[[IDXLO]]
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// ARM64: %[[BYTE:[^ ]*]] = atomicrmw or ptr %[[BYTEADDR]], i8 %[[MASK]] acquire, align 1
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// ARM64: %[[BYTESHR:[^ ]*]] = lshr i8 %[[BYTE]], %[[IDXLO]]
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// ARM64: %[[RES:[^ ]*]] = and i8 %[[BYTESHR]], 1
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// ARM64: store volatile i8 %[[RES]], ptr @sink, align 1
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// ARM64: atomicrmw or ptr %{{.*}}, i8 {{.*}} release, align 1
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// ARM64: atomicrmw or ptr %{{.*}}, i8 {{.*}} monotonic, align 1
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