derek.holloway
7502bf64a4
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87 lines
5.2 KiB
Common Lisp
87 lines
5.2 KiB
Common Lisp
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --include-generated-funcs --version 6
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// RUN: %clang_cc1 -cl-std=CL1.2 -triple amdgcn-amd-amdhsa -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s
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int printf(__constant const char* st, ...) __attribute__((format(printf, 1, 2)));
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__kernel void test_printf_noargs() {
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printf("");
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}
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__kernel void test_printf_int(int i) {
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printf("%d", i);
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}
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__kernel void test_printf_str_int(int i) {
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char s[] = "foo";
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printf("%s:%d", s, i);
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}
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// CHECK-LABEL: define dso_local amdgpu_kernel void @test_printf_noargs(
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// CHECK-SAME: ) #[[ATTR0:[0-9]+]] !kernel_arg_addr_space [[META8:![0-9]+]] !kernel_arg_access_qual [[META8]] !kernel_arg_type [[META8]] !kernel_arg_base_type [[META8]] !kernel_arg_type_qual [[META8]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: call void @__clang_ocl_kern_imp_test_printf_noargs() #[[ATTR5:[0-9]+]]
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// CHECK-NEXT: ret void
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//
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//
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// CHECK-LABEL: define dso_local void @__clang_ocl_kern_imp_test_printf_noargs(
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// CHECK-SAME: ) #[[ATTR1:[0-9]+]] !kernel_arg_addr_space [[META8]] !kernel_arg_access_qual [[META8]] !kernel_arg_type [[META8]] !kernel_arg_base_type [[META8]] !kernel_arg_type_qual [[META8]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[CALL:%.*]] = call i32 (ptr addrspace(4), ...) @printf(ptr addrspace(4) noundef @.str) #[[ATTR5]]
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// CHECK-NEXT: ret void
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//
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//
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// CHECK-LABEL: define dso_local amdgpu_kernel void @test_printf_int(
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// CHECK-SAME: i32 noundef [[I:%.*]]) #[[ATTR0]] !kernel_arg_addr_space [[META9:![0-9]+]] !kernel_arg_access_qual [[META10:![0-9]+]] !kernel_arg_type [[META11:![0-9]+]] !kernel_arg_base_type [[META11]] !kernel_arg_type_qual [[META12:![0-9]+]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4, addrspace(5)
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// CHECK-NEXT: store i32 [[I]], ptr addrspace(5) [[I_ADDR]], align 4, !tbaa [[INT_TBAA4:![0-9]+]]
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr addrspace(5) [[I_ADDR]], align 4, !tbaa [[INT_TBAA4]]
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// CHECK-NEXT: call void @__clang_ocl_kern_imp_test_printf_int(i32 noundef [[TMP0]]) #[[ATTR5]]
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// CHECK-NEXT: ret void
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//
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//
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// CHECK-LABEL: define dso_local void @__clang_ocl_kern_imp_test_printf_int(
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// CHECK-SAME: i32 noundef [[I:%.*]]) #[[ATTR1]] !kernel_arg_addr_space [[META9]] !kernel_arg_access_qual [[META10]] !kernel_arg_type [[META11]] !kernel_arg_base_type [[META11]] !kernel_arg_type_qual [[META12]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4, addrspace(5)
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// CHECK-NEXT: store i32 [[I]], ptr addrspace(5) [[I_ADDR]], align 4, !tbaa [[INT_TBAA4]]
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr addrspace(5) [[I_ADDR]], align 4, !tbaa [[INT_TBAA4]]
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// CHECK-NEXT: [[CALL:%.*]] = call i32 (ptr addrspace(4), ...) @printf(ptr addrspace(4) noundef @.str.1, i32 noundef [[TMP0]]) #[[ATTR5]]
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// CHECK-NEXT: ret void
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//
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//
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// CHECK-LABEL: define dso_local amdgpu_kernel void @test_printf_str_int(
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// CHECK-SAME: i32 noundef [[I:%.*]]) #[[ATTR0]] !kernel_arg_addr_space [[META9]] !kernel_arg_access_qual [[META10]] !kernel_arg_type [[META11]] !kernel_arg_base_type [[META11]] !kernel_arg_type_qual [[META12]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4, addrspace(5)
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// CHECK-NEXT: store i32 [[I]], ptr addrspace(5) [[I_ADDR]], align 4, !tbaa [[INT_TBAA4]]
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr addrspace(5) [[I_ADDR]], align 4, !tbaa [[INT_TBAA4]]
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// CHECK-NEXT: call void @__clang_ocl_kern_imp_test_printf_str_int(i32 noundef [[TMP0]]) #[[ATTR5]]
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// CHECK-NEXT: ret void
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//
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//
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// CHECK-LABEL: define dso_local void @__clang_ocl_kern_imp_test_printf_str_int(
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// CHECK-SAME: i32 noundef [[I:%.*]]) #[[ATTR1]] !kernel_arg_addr_space [[META9]] !kernel_arg_access_qual [[META10]] !kernel_arg_type [[META11]] !kernel_arg_base_type [[META11]] !kernel_arg_type_qual [[META12]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4, addrspace(5)
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// CHECK-NEXT: [[S:%.*]] = alloca [4 x i8], align 1, addrspace(5)
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// CHECK-NEXT: store i32 [[I]], ptr addrspace(5) [[I_ADDR]], align 4, !tbaa [[INT_TBAA4]]
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// CHECK-NEXT: call void @llvm.lifetime.start.p5(ptr addrspace(5) [[S]]) #[[ATTR6:[0-9]+]]
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// CHECK-NEXT: call void @llvm.memcpy.p5.p4.i64(ptr addrspace(5) align 1 [[S]], ptr addrspace(4) align 1 @__const.test_printf_str_int.s, i64 4, i1 false)
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// CHECK-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [4 x i8], ptr addrspace(5) [[S]], i64 0, i64 0
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr addrspace(5) [[I_ADDR]], align 4, !tbaa [[INT_TBAA4]]
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// CHECK-NEXT: [[CALL:%.*]] = call i32 (ptr addrspace(4), ...) @printf(ptr addrspace(4) noundef @.str.2, ptr addrspace(5) noundef [[ARRAYDECAY]], i32 noundef [[TMP0]]) #[[ATTR5]]
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// CHECK-NEXT: call void @llvm.lifetime.end.p5(ptr addrspace(5) [[S]]) #[[ATTR6]]
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// CHECK-NEXT: ret void
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//
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//.
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// CHECK: [[INT_TBAA4]] = !{[[META5:![0-9]+]], [[META5]], i64 0}
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// CHECK: [[META5]] = !{!"int", [[META6:![0-9]+]], i64 0}
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// CHECK: [[META6]] = !{!"omnipotent char", [[META7:![0-9]+]], i64 0}
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// CHECK: [[META7]] = !{!"Simple C/C++ TBAA"}
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// CHECK: [[META8]] = !{}
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// CHECK: [[META9]] = !{i32 0}
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// CHECK: [[META10]] = !{!"none"}
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// CHECK: [[META11]] = !{!"int"}
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// CHECK: [[META12]] = !{!""}
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//.
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