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54 lines
1.6 KiB
ArmAsm
54 lines
1.6 KiB
ArmAsm
// REQUIRES: aarch64
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// RUN: rm -rf %t && split-file %s %t
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// RUN: llvm-mc -triple aarch64-none-elf -filetype=obj -o %t/a.o %t/a.s
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// RUN: ld.lld --shared %t/a.o -T %t/a.t -o %t/a
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// RUN: llvm-objdump --no-show-raw-insn -d --start-address=0x7001004 --stop-address=0x7001010 %t/a | FileCheck %s
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// RUN: llvm-objdump --no-show-raw-insn -d --start-address=0x11001008 --stop-address=0x11001014 %t/a | FileCheck --check-prefix=CHECK2 %s
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// RUN: rm -f %t/a
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/// This test shows that once a long-range thunk has been generated it
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/// cannot be written as a short-range thunk. This prevents oscillations
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/// in size that can prevent convergence.
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/// In pass 0 bl foo requires a long-range thunk to reach foo. The thunk for
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/// bar increases the address of foo so that ic can be reaced by bl foo with a
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/// a single b instruction.
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/// In pass 2 we expect the the long-range thunk to remain long.
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// CHECK-LABEL: <__AArch64ADRPThunk_>:
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// CHECK-NEXT: 7001004: adrp x16, 0x11001000
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// CHECK-NEXT: add x16, x16, #0x14
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// CHECK-NEXT: br x16
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// CHECK2-LABEL: <__AArch64ADRPThunk_>:
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// CHECK2-NEXT: 11001008: adrp x16, 0x9001000
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// CHECK2-NEXT: add x16, x16, #0x10
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// CHECK2-NEXT: br x16
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//--- a.t
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SECTIONS {
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.foo 0x1000 : { *(.foo.*) }
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.bar 0x11001000 : { *(.bar.*) }
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}
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//--- a.s
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.section .foo.1,"ax",%progbits,unique,1
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bl bar
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.section .foo.2,"ax",%progbits,unique,1
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.space 0x7000000
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.section .foo.3,"ax",%progbits,unique,1
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.space 0x2000000
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.section .foo.4,"ax",%progbits,unique,1
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foo:
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nop
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.section .bar.1,"ax",%progbits,unique,1
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nop
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nop
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.section .bar.2,"ax",%progbits,unique,1
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bar:
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bl foo
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.space 0x8000000
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