derek.holloway
7502bf64a4
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75 lines
3.0 KiB
LLVM
75 lines
3.0 KiB
LLVM
; RUN: llvm-as < %s | llvm-dis > %t.orig
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; RUN: llvm-as < %s | llvm-c-test --echo > %t.echo
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; RUN: diff -w %t.orig %t.echo
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define void @fence_instrs() {
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fence acquire
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fence release
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fence acq_rel
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fence seq_cst
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fence syncscope("singlethread") acquire
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fence syncscope("singlethread") release
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fence syncscope("singlethread") acq_rel
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fence syncscope("singlethread") seq_cst
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ret void
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}
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define void @atomic_load_store(ptr %word) {
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; Test different atomic loads
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%ld.1 = load atomic i32, ptr %word monotonic, align 4
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%ld.2 = load atomic volatile i32, ptr %word acquire, align 4
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%ld.3 = load atomic volatile i32, ptr %word seq_cst, align 4
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%ld.4 = load atomic volatile i32, ptr %word syncscope("singlethread") acquire, align 4
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%ld.5 = load atomic volatile i32, ptr %word syncscope("singlethread") seq_cst, align 4
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%ld.6 = load atomic i32, ptr %word syncscope("singlethread") seq_cst, align 4
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; Test different atomic stores
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store atomic i32 1, ptr %word monotonic, align 4
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store atomic volatile i32 2, ptr %word release, align 4
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store atomic volatile i32 3, ptr %word seq_cst, align 4
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store atomic volatile i32 4, ptr %word syncscope("singlethread") release, align 4
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store atomic volatile i32 5, ptr %word syncscope("singlethread") seq_cst, align 4
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store atomic i32 6, ptr %word syncscope("singlethread") seq_cst, align 4
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ret void
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}
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define void @atomic_rmw_ops(ptr %p, i32 %i, float %f) {
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; Test all atomicrmw operations
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%a.xchg = atomicrmw xchg ptr %p, i32 %i acq_rel, align 8
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%a.add = atomicrmw add ptr %p, i32 %i acq_rel, align 8
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%a.sub = atomicrmw sub ptr %p, i32 %i acq_rel, align 8
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%a.and = atomicrmw and ptr %p, i32 %i acq_rel, align 8
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%a.nand = atomicrmw nand ptr %p, i32 %i acq_rel, align 8
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%a.or = atomicrmw or ptr %p, i32 %i acq_rel, align 8
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%a.xor = atomicrmw xor ptr %p, i32 %i acq_rel, align 8
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%a.max = atomicrmw max ptr %p, i32 %i acq_rel, align 8
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%a.min = atomicrmw min ptr %p, i32 %i acq_rel, align 8
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%a.umax = atomicrmw umax ptr %p, i32 %i acq_rel, align 8
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%a.umin = atomicrmw umin ptr %p, i32 %i acq_rel, align 8
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%a.fadd = atomicrmw fadd ptr %p, float %f acq_rel, align 8
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%a.fsub = atomicrmw fsub ptr %p, float %f acq_rel, align 8
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%a.fmax = atomicrmw fmax ptr %p, float %f acq_rel, align 8
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%a.fmin = atomicrmw fmin ptr %p, float %f acq_rel, align 8
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%a.fmaximum = atomicrmw fmaximum ptr %p, float %f acq_rel, align 8
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%a.fminimum = atomicrmw fminimum ptr %p, float %f acq_rel, align 8
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%a.uinc_wrap = atomicrmw uinc_wrap ptr %p, i32 %i acq_rel, align 8
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%a.udec_wrap = atomicrmw udec_wrap ptr %p, i32 %i acq_rel, align 8
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%a.usub_sat = atomicrmw usub_sat ptr %p, i32 %i acq_rel, align 8
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%a.usub_cond = atomicrmw usub_cond ptr %p, i32 %i acq_rel, align 8
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ret void
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}
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define i32 @main() {
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%1 = alloca i32, align 4
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%2 = cmpxchg ptr %1, i32 2, i32 3 seq_cst acquire
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%3 = extractvalue { i32, i1 } %2, 0
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ret i32 %3
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}
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