derek.holloway
7502bf64a4
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302 lines
11 KiB
LLVM
302 lines
11 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64 < %s | FileCheck %s
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define float @test_v2f32_element_0_zero(<2 x float> %vec) {
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; CHECK-LABEL: test_v2f32_element_0_zero:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-NEXT: mov s0, v0.s[1]
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; CHECK-NEXT: ret
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entry:
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%with_zero = insertelement <2 x float> %vec, float 0.0, i64 0
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%sum = call nsz float @llvm.aarch64.neon.faddv.f32.v2f32(<2 x float> %with_zero)
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ret float %sum
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}
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define float @test_v4f32_element_3_zero(<4 x float> %vec) {
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; CHECK-LABEL: test_v4f32_element_3_zero:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov s1, v0.s[2]
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; CHECK-NEXT: faddp s0, v0.2s
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; CHECK-NEXT: fadd s0, s0, s1
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; CHECK-NEXT: ret
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entry:
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%with_zero = insertelement <4 x float> %vec, float 0.0, i64 3
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%sum = call nsz float @llvm.aarch64.neon.faddv.f32.v4f32(<4 x float> %with_zero)
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ret float %sum
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}
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define float @test_v4f32_elements_0_2_zero(<4 x float> %vec) {
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; CHECK-LABEL: test_v4f32_elements_0_2_zero:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov s1, v0.s[3]
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; CHECK-NEXT: mov s0, v0.s[1]
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; CHECK-NEXT: fadd s0, s0, s1
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; CHECK-NEXT: ret
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entry:
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%zero1 = insertelement <4 x float> %vec, float 0.0, i64 0
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%zero2 = insertelement <4 x float> %zero1, float 0.0, i64 2
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%sum = call nsz float @llvm.aarch64.neon.faddv.f32.v4f32(<4 x float> %zero2)
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ret float %sum
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}
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define float @test_v4f32_all_zero(<4 x float> %vec) {
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; CHECK-LABEL: test_v4f32_all_zero:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: movi d0, #0000000000000000
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; CHECK-NEXT: ret
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entry:
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%zero1 = insertelement <4 x float> %vec, float 0.0, i64 0
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%zero2 = insertelement <4 x float> %zero1, float 0.0, i64 1
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%zero3 = insertelement <4 x float> %zero2, float 0.0, i64 2
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%zero4 = insertelement <4 x float> %zero3, float 0.0, i64 3
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%sum = call float @llvm.aarch64.neon.faddv.f32.v4f32(<4 x float> %zero4)
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ret float %sum
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}
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define double @test_v2f64_element_0_zero(<2 x double> %vec) {
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; CHECK-LABEL: test_v2f64_element_0_zero:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov d0, v0.d[1]
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; CHECK-NEXT: ret
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entry:
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%with_zero = insertelement <2 x double> %vec, double 0.0, i64 0
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%sum = call nsz double @llvm.aarch64.neon.faddv.f64.v2f64(<2 x double> %with_zero)
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ret double %sum
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}
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define float @negative_test(<4 x float> %vec) {
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; CHECK-LABEL: negative_test:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi d1, #0000000000000000
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; CHECK-NEXT: mov v0.s[3], v1.s[0]
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; CHECK-NEXT: faddp v0.4s, v0.4s, v0.4s
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; CHECK-NEXT: faddp s0, v0.2s
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; CHECK-NEXT: ret
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%with_zero = insertelement <4 x float> %vec, float 0.0, i64 3
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%sum = call float @llvm.aarch64.neon.faddv.f32.v4f32(<4 x float> %with_zero)
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ret float %sum
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}
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define float @test_reduce_v2f32_element_0_zero(<2 x float> %vec) {
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; CHECK-LABEL: test_reduce_v2f32_element_0_zero:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-NEXT: mov s0, v0.s[1]
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; CHECK-NEXT: ret
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entry:
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%with_zero = insertelement <2 x float> %vec, float 0.0, i64 0
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%sum = call reassoc nsz float @llvm.vector.reduce.fadd.v2f32(float -0.0, <2 x float> %with_zero)
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ret float %sum
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}
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define float @test_reduce_v4f32_element_3_zero(<4 x float> %vec) {
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; CHECK-LABEL: test_reduce_v4f32_element_3_zero:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov s1, v0.s[2]
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; CHECK-NEXT: faddp s0, v0.2s
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; CHECK-NEXT: fadd s0, s0, s1
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; CHECK-NEXT: ret
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entry:
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%with_zero = insertelement <4 x float> %vec, float 0.0, i64 3
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%sum = call reassoc nsz float @llvm.vector.reduce.fadd.v4f32(float -0.0, <4 x float> %with_zero)
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ret float %sum
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}
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define float @test_reduce_v4f32_elements_0_2_zero(<4 x float> %vec) {
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; CHECK-LABEL: test_reduce_v4f32_elements_0_2_zero:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov s1, v0.s[3]
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; CHECK-NEXT: mov s0, v0.s[1]
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; CHECK-NEXT: fadd s0, s0, s1
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; CHECK-NEXT: ret
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entry:
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%zero1 = insertelement <4 x float> %vec, float 0.0, i64 0
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%zero2 = insertelement <4 x float> %zero1, float 0.0, i64 2
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%sum = call reassoc nsz float @llvm.vector.reduce.fadd.v4f32(float -0.0, <4 x float> %zero2)
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ret float %sum
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}
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define float @test_reduce_v4f32_all_zero(<4 x float> %vec) {
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; CHECK-LABEL: test_reduce_v4f32_all_zero:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: movi d0, #0000000000000000
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; CHECK-NEXT: ret
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entry:
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%zero1 = insertelement <4 x float> %vec, float 0.0, i64 0
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%zero2 = insertelement <4 x float> %zero1, float 0.0, i64 1
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%zero3 = insertelement <4 x float> %zero2, float 0.0, i64 2
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%zero4 = insertelement <4 x float> %zero3, float 0.0, i64 3
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%sum = call reassoc nsz float @llvm.vector.reduce.fadd.v4f32(float -0.0, <4 x float> %zero4)
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ret float %sum
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}
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define double @test_reduce_v2f64_element_0_zero(<2 x double> %vec) {
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; CHECK-LABEL: test_reduce_v2f64_element_0_zero:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov d0, v0.d[1]
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; CHECK-NEXT: ret
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entry:
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%with_zero = insertelement <2 x double> %vec, double 0.0, i64 0
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%sum = call reassoc nsz double @llvm.vector.reduce.fadd.v2f64(double -0.0, <2 x double> %with_zero)
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ret double %sum
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}
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define float @negative_test_reduce(<4 x float> %vec) {
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; CHECK-LABEL: negative_test_reduce:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi d1, #0000000000000000
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; CHECK-NEXT: mov v0.s[3], v1.s[0]
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; CHECK-NEXT: faddp v0.4s, v0.4s, v0.4s
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; CHECK-NEXT: faddp s0, v0.2s
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; CHECK-NEXT: ret
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%with_zero = insertelement <4 x float> %vec, float 0.0, i64 3
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%sum = call reassoc float @llvm.vector.reduce.fadd.v4f32(float -0.0, <4 x float> %with_zero)
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ret float %sum
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}
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define float @test_seq_reduce_v2f32_element_0_zero(<2 x float> %vec) {
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; CHECK-LABEL: test_seq_reduce_v2f32_element_0_zero:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-NEXT: mov s0, v0.s[1]
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; CHECK-NEXT: ret
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entry:
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%with_zero = insertelement <2 x float> %vec, float 0.0, i64 0
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%sum = call nsz float @llvm.vector.reduce.fadd.v2f32(float -0.0, <2 x float> %with_zero)
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ret float %sum
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}
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define float @test_seq_reduce_v4f32_element_3_zero(<4 x float> %vec) {
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; CHECK-LABEL: test_seq_reduce_v4f32_element_3_zero:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov s1, v0.s[2]
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; CHECK-NEXT: faddp s0, v0.2s
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; CHECK-NEXT: fadd s0, s0, s1
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; CHECK-NEXT: ret
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entry:
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%with_zero = insertelement <4 x float> %vec, float 0.0, i64 3
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%sum = call nsz float @llvm.vector.reduce.fadd.v4f32(float -0.0, <4 x float> %with_zero)
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ret float %sum
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}
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define float @test_seq_reduce_v4f32_elements_0_2_zero(<4 x float> %vec) {
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; CHECK-LABEL: test_seq_reduce_v4f32_elements_0_2_zero:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov s1, v0.s[3]
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; CHECK-NEXT: mov s0, v0.s[1]
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; CHECK-NEXT: fadd s0, s0, s1
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; CHECK-NEXT: ret
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entry:
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%zero1 = insertelement <4 x float> %vec, float 0.0, i64 0
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%zero2 = insertelement <4 x float> %zero1, float 0.0, i64 2
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%sum = call nsz float @llvm.vector.reduce.fadd.v4f32(float -0.0, <4 x float> %zero2)
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ret float %sum
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}
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define float @test_seq_reduce_v4f32_all_zero(float %start, <4 x float> %vec) {
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; CHECK-LABEL: test_seq_reduce_v4f32_all_zero:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ret
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entry:
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%zero1 = insertelement <4 x float> %vec, float 0.0, i64 0
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%zero2 = insertelement <4 x float> %zero1, float 0.0, i64 1
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%zero3 = insertelement <4 x float> %zero2, float 0.0, i64 2
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%zero4 = insertelement <4 x float> %zero3, float 0.0, i64 3
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%sum = call nsz float @llvm.vector.reduce.fadd.v4f32(float %start, <4 x float> %zero4)
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ret float %sum
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}
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define float @test_seq_reduce_with_start(float %start, <4 x float> %vec) {
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; CHECK-LABEL: test_seq_reduce_with_start:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fadd s0, s0, s1
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; CHECK-NEXT: mov s2, v1.s[1]
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; CHECK-NEXT: mov s1, v1.s[2]
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; CHECK-NEXT: fadd s0, s0, s2
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; CHECK-NEXT: fadd s0, s0, s1
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; CHECK-NEXT: ret
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entry:
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%with_zero = insertelement <4 x float> %vec, float 0.0, i64 3
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%sum = call nsz float @llvm.vector.reduce.fadd.v4f32(float %start, <4 x float> %with_zero)
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ret float %sum
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}
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define double @test_seq_reduce_v2f64_element_0_zero(<2 x double> %vec) {
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; CHECK-LABEL: test_seq_reduce_v2f64_element_0_zero:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov d0, v0.d[1]
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; CHECK-NEXT: ret
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entry:
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%with_zero = insertelement <2 x double> %vec, double 0.0, i64 0
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%sum = call nsz double @llvm.vector.reduce.fadd.v2f64(double -0.0, <2 x double> %with_zero)
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ret double %sum
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}
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define float @negative_test_seq_reduce(<4 x float> %vec) {
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; CHECK-LABEL: negative_test_seq_reduce:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov s2, v0.s[2]
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; CHECK-NEXT: faddp s0, v0.2s
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; CHECK-NEXT: movi d1, #0000000000000000
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; CHECK-NEXT: fadd s0, s0, s2
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; CHECK-NEXT: fadd s0, s0, s1
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; CHECK-NEXT: ret
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%with_zero = insertelement <4 x float> %vec, float 0.0, i64 3
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%sum = call float @llvm.vector.reduce.fadd.v4f32(float -0.0, <4 x float> %with_zero)
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ret float %sum
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}
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; Negative test: sequential all-zero without nsz should not return Start
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; directly because fadd(-0.0, +0.0) = +0.0, not -0.0.
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define float @negative_test_seq_reduce_all_zero_no_nsz(float %start, <4 x float> %vec) {
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; CHECK-LABEL: negative_test_seq_reduce_all_zero_no_nsz:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: movi d1, #0000000000000000
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; CHECK-NEXT: fadd s0, s0, s1
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; CHECK-NEXT: ret
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entry:
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%zero1 = insertelement <4 x float> %vec, float 0.0, i64 0
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%zero2 = insertelement <4 x float> %zero1, float 0.0, i64 1
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%zero3 = insertelement <4 x float> %zero2, float 0.0, i64 2
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%zero4 = insertelement <4 x float> %zero3, float 0.0, i64 3
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%sum = call float @llvm.vector.reduce.fadd.v4f32(float %start, <4 x float> %zero4)
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ret float %sum
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}
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; Test with -0.0 elements (negative zero). With nsz, these should be
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; treated as zero elements.
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define float @test_v4f32_neg_zero_element(<4 x float> %vec) {
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; CHECK-LABEL: test_v4f32_neg_zero_element:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov s1, v0.s[2]
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; CHECK-NEXT: faddp s0, v0.2s
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; CHECK-NEXT: fadd s0, s0, s1
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; CHECK-NEXT: ret
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entry:
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%with_neg_zero = insertelement <4 x float> %vec, float -0.0, i64 3
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%sum = call nsz float @llvm.aarch64.neon.faddv.f32.v4f32(<4 x float> %with_neg_zero)
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ret float %sum
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}
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define float @test_reduce_v4f32_neg_zero_element(<4 x float> %vec) {
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; CHECK-LABEL: test_reduce_v4f32_neg_zero_element:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov s1, v0.s[2]
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; CHECK-NEXT: faddp s0, v0.2s
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; CHECK-NEXT: fadd s0, s0, s1
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; CHECK-NEXT: ret
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entry:
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%with_neg_zero = insertelement <4 x float> %vec, float -0.0, i64 3
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%sum = call reassoc nsz float @llvm.vector.reduce.fadd.v4f32(float -0.0, <4 x float> %with_neg_zero)
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ret float %sum
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}
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declare float @llvm.aarch64.neon.faddv.f32.v2f32(<2 x float>)
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declare float @llvm.aarch64.neon.faddv.f32.v4f32(<4 x float>)
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declare double @llvm.aarch64.neon.faddv.f64.v2f64(<2 x double>)
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declare float @llvm.vector.reduce.fadd.v2f32(float, <2 x float>)
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declare float @llvm.vector.reduce.fadd.v4f32(float, <4 x float>)
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declare double @llvm.vector.reduce.fadd.v2f64(double, <2 x double>)
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