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173 lines
4.7 KiB
LLVM
173 lines
4.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -o - %s -mtriple=aarch64-linux-gnu | FileCheck %s
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; RUN: llc -verify-machineinstrs -o - %s -mtriple=aarch64-linux-gnu -mattr=+cssc | FileCheck %s -check-prefix=CHECK-CSSC
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define i4 @cttz4(i4 %x) {
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; CHECK-LABEL: cttz4:
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; CHECK: // %bb.0:
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; CHECK-NEXT: orr w8, w0, #0x10
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; CHECK-NEXT: rbit w8, w8
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; CHECK-NEXT: clz w0, w8
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; CHECK-NEXT: ret
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;
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; CHECK-CSSC-LABEL: cttz4:
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; CHECK-CSSC: // %bb.0:
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; CHECK-CSSC-NEXT: orr w8, w0, #0x10
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; CHECK-CSSC-NEXT: ctz w0, w8
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; CHECK-CSSC-NEXT: ret
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%ctz = tail call i4 @llvm.cttz.i4(i4 %x)
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ret i4 %ctz
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}
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define i8 @cttz8(i8 %x) {
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; CHECK-LABEL: cttz8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: orr w8, w0, #0x100
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; CHECK-NEXT: rbit w8, w8
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; CHECK-NEXT: clz w0, w8
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; CHECK-NEXT: ret
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;
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; CHECK-CSSC-LABEL: cttz8:
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; CHECK-CSSC: // %bb.0:
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; CHECK-CSSC-NEXT: orr w8, w0, #0x100
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; CHECK-CSSC-NEXT: ctz w0, w8
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; CHECK-CSSC-NEXT: ret
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%ctz = tail call i8 @llvm.cttz.i8(i8 %x)
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ret i8 %ctz
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}
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define i16 @cttz16(i16 %x) {
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; CHECK-LABEL: cttz16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: orr w8, w0, #0x10000
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; CHECK-NEXT: rbit w8, w8
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; CHECK-NEXT: clz w0, w8
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; CHECK-NEXT: ret
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;
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; CHECK-CSSC-LABEL: cttz16:
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; CHECK-CSSC: // %bb.0:
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; CHECK-CSSC-NEXT: orr w8, w0, #0x10000
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; CHECK-CSSC-NEXT: ctz w0, w8
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; CHECK-CSSC-NEXT: ret
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%ctz = tail call i16 @llvm.cttz.i16(i16 %x)
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ret i16 %ctz
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}
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define i17 @cttz17(i17 %x) {
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; CHECK-LABEL: cttz17:
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; CHECK: // %bb.0:
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; CHECK-NEXT: orr w8, w0, #0x20000
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; CHECK-NEXT: rbit w8, w8
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; CHECK-NEXT: clz w0, w8
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; CHECK-NEXT: ret
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;
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; CHECK-CSSC-LABEL: cttz17:
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; CHECK-CSSC: // %bb.0:
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; CHECK-CSSC-NEXT: orr w8, w0, #0x20000
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; CHECK-CSSC-NEXT: ctz w0, w8
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; CHECK-CSSC-NEXT: ret
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%ctz = tail call i17 @llvm.cttz.i17(i17 %x)
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ret i17 %ctz
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}
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define i32 @cttz32(i32 %x) nounwind readnone {
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; CHECK-LABEL: cttz32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rbit w8, w0
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; CHECK-NEXT: clz w0, w8
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; CHECK-NEXT: ret
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;
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; CHECK-CSSC-LABEL: cttz32:
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; CHECK-CSSC: // %bb.0:
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; CHECK-CSSC-NEXT: ctz w0, w0
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; CHECK-CSSC-NEXT: ret
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%ctz = tail call i32 @llvm.cttz.i32(i32 %x)
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ret i32 %ctz
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}
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define i64 @cttz64(i64 %x) nounwind readnone {
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; CHECK-LABEL: cttz64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rbit x8, x0
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; CHECK-NEXT: clz x0, x8
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; CHECK-NEXT: ret
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;
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; CHECK-CSSC-LABEL: cttz64:
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; CHECK-CSSC: // %bb.0:
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; CHECK-CSSC-NEXT: ctz x0, x0
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; CHECK-CSSC-NEXT: ret
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%ctz = tail call i64 @llvm.cttz.i64(i64 %x)
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ret i64 %ctz
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}
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define i128 @cttz128(i128 %x) nounwind readnone {
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; CHECK-LABEL: cttz128:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rbit x8, x1
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; CHECK-NEXT: rbit x9, x0
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; CHECK-NEXT: cmp x0, #0
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; CHECK-NEXT: mov x1, xzr
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; CHECK-NEXT: clz x8, x8
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; CHECK-NEXT: clz x9, x9
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; CHECK-NEXT: add x8, x8, #64
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; CHECK-NEXT: csel x0, x9, x8, ne
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; CHECK-NEXT: ret
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;
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; CHECK-CSSC-LABEL: cttz128:
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; CHECK-CSSC: // %bb.0:
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; CHECK-CSSC-NEXT: ctz x8, x1
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; CHECK-CSSC-NEXT: ctz x9, x0
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; CHECK-CSSC-NEXT: cmp x0, #0
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; CHECK-CSSC-NEXT: add x8, x8, #64
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; CHECK-CSSC-NEXT: mov x1, xzr
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; CHECK-CSSC-NEXT: csel x0, x9, x8, ne
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; CHECK-CSSC-NEXT: ret
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%ctz = tail call i128 @llvm.cttz.i128(i128 %x)
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ret i128 %ctz
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}
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define i32 @cttz32combine(i32 %x) nounwind readnone {
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; CHECK-LABEL: cttz32combine:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rbit w8, w0
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; CHECK-NEXT: clz w0, w8
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; CHECK-NEXT: ret
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;
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; CHECK-CSSC-LABEL: cttz32combine:
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; CHECK-CSSC: // %bb.0:
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; CHECK-CSSC-NEXT: ctz w0, w0
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; CHECK-CSSC-NEXT: ret
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%rev = tail call i32 @llvm.bitreverse.i32(i32 %x)
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%ctz = tail call i32 @llvm.ctlz.i32(i32 %rev)
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ret i32 %ctz
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}
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define i64 @cttz64combine(i64 %x) nounwind readnone {
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; CHECK-LABEL: cttz64combine:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rbit x8, x0
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; CHECK-NEXT: clz x0, x8
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; CHECK-NEXT: ret
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;
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; CHECK-CSSC-LABEL: cttz64combine:
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; CHECK-CSSC: // %bb.0:
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; CHECK-CSSC-NEXT: ctz x0, x0
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; CHECK-CSSC-NEXT: ret
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%rev = tail call i64 @llvm.bitreverse.i64(i64 %x)
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%ctz = tail call i64 @llvm.ctlz.i64(i64 %rev)
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ret i64 %ctz
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}
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declare i4 @llvm.cttz.i4(i4 %x) nounwind readnone
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declare i8 @llvm.cttz.i8(i8 %x) nounwind readnone
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declare i16 @llvm.cttz.i16(i16 %x) nounwind readnone
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declare i17 @llvm.cttz.i17(i17 %x) nounwind readnone
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declare i32 @llvm.cttz.i32(i32) nounwind readnone
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declare i64 @llvm.cttz.i64(i64) nounwind readnone
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declare i128 @llvm.cttz.i128(i128) nounwind readnone
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declare i32 @llvm.ctlz.i32(i32 %x) nounwind readnone
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declare i32 @llvm.bitreverse.i32(i32 %x) nounwind readnone
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declare i64 @llvm.ctlz.i64(i64 %x) nounwind readnone
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declare i64 @llvm.bitreverse.i64(i64 %x) nounwind readnone
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