derek.holloway
7502bf64a4
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133 lines
3.0 KiB
LLVM
133 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=aarch64 -code-model=tiny -verify-machineinstrs | FileCheck %s
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%struct.T = type <{ i32, i64, i8, i32 }>
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@ptr = external dso_local local_unnamed_addr global ptr, align 8
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@ch = external dso_local local_unnamed_addr global i32, align 4
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@ch8 = external dso_local local_unnamed_addr global i8, align 4
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@t = external dso_local local_unnamed_addr global %struct.T, align 4
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@t2 = external dso_local local_unnamed_addr global %struct.T, align 2
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@f = external dso_local local_unnamed_addr global float, align 4
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define i32 @barp() {
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; CHECK-LABEL: barp:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ldr x8, ptr
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; CHECK-NEXT: ldr w0, [x8]
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; CHECK-NEXT: ret
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entry:
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%0 = load ptr, ptr @ptr, align 8
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%1 = load i32, ptr %0, align 4
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ret i32 %1
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}
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define i32 @barch() {
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; CHECK-LABEL: barch:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ldr w0, ch
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; CHECK-NEXT: ret
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entry:
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%0 = load i32, ptr @ch, align 4
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ret i32 %0
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}
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define i32 @barta() {
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; CHECK-LABEL: barta:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ldr w0, t
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; CHECK-NEXT: ret
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entry:
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%0 = load i32, ptr @t, align 4
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ret i32 %0
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}
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define i64 @bartb() {
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; CHECK-LABEL: bartb:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ldr x0, t+4
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; CHECK-NEXT: ret
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entry:
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%0 = load i64, ptr getelementptr inbounds (%struct.T, ptr @t, i64 0, i32 1), align 8
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ret i64 %0
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}
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define i32 @bartc() {
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; CHECK-LABEL: bartc:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: adr x8, t+13
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; CHECK-NEXT: ldr w0, [x8]
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; CHECK-NEXT: ret
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entry:
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%0 = load i32, ptr getelementptr inbounds (%struct.T, ptr @t, i64 0, i32 3), align 1
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ret i32 %0
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}
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define i32 @bart2a() {
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; CHECK-LABEL: bart2a:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: adr x8, t2
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; CHECK-NEXT: ldr w0, [x8]
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; CHECK-NEXT: ret
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entry:
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%0 = load i32, ptr @t2, align 2
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ret i32 %0
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}
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define i64 @zextload() {
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; CHECK-LABEL: zextload:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ldr w0, ch
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; CHECK-NEXT: ret
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entry:
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%0 = load i32, ptr @ch, align 4
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%1 = zext i32 %0 to i64
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ret i64 %1
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}
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define i64 @zextload8() {
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; CHECK-LABEL: zextload8:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: adr x8, ch8
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; CHECK-NEXT: ldrb w0, [x8]
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; CHECK-NEXT: ret
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entry:
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%0 = load i8, ptr @ch8, align 4
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%1 = zext i8 %0 to i64
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ret i64 %1
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}
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define i64 @sextload() {
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; CHECK-LABEL: sextload:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ldrsw x0, ch
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; CHECK-NEXT: ret
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entry:
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%0 = load i32, ptr @ch, align 4
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%1 = sext i32 %0 to i64
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ret i64 %1
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}
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define i64 @sextload8() {
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; CHECK-LABEL: sextload8:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: adr x8, ch8
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; CHECK-NEXT: ldrsb x0, [x8]
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; CHECK-NEXT: ret
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entry:
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%0 = load i8, ptr @ch8, align 4
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%1 = sext i8 %0 to i64
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ret i64 %1
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}
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define float @floatload() {
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; CHECK-LABEL: floatload:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ldr s0, f
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; CHECK-NEXT: ret
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entry:
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%0 = load float, ptr @f, align 4
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ret float %0
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}
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