derek.holloway
7502bf64a4
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336 lines
9.9 KiB
LLVM
336 lines
9.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc < %s | FileCheck %s
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target triple = "aarch64-unknown-linux-gnu"
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define i32 @vmask_popcount_i32_v8i8(<8 x i8> %a, <8 x i8> %b) {
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; CHECK-LABEL: vmask_popcount_i32_v8i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmgt v0.8b, v1.8b, v0.8b
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; CHECK-NEXT: addv b0, v0.8b
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; CHECK-NEXT: smov w8, v0.b[0]
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; CHECK-NEXT: neg w0, w8
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; CHECK-NEXT: ret
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%mask = icmp slt <8 x i8> %a, %b
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%t1 = bitcast <8 x i1> %mask to i8
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%t2 = call i8 @llvm.ctpop(i8 %t1)
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%t3 = zext i8 %t2 to i32
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ret i32 %t3
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}
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define i32 @vmask_popcount_i32_v16i8(<16 x i8> %a, <16 x i8> %b) {
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; CHECK-LABEL: vmask_popcount_i32_v16i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmgt v0.16b, v1.16b, v0.16b
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; CHECK-NEXT: addv b0, v0.16b
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; CHECK-NEXT: smov w8, v0.b[0]
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; CHECK-NEXT: neg w0, w8
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; CHECK-NEXT: ret
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%mask = icmp slt <16 x i8> %a, %b
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%t1 = bitcast <16 x i1> %mask to i16
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%t2 = call i16 @llvm.ctpop(i16 %t1)
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%t3 = zext i16 %t2 to i32
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ret i32 %t3
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}
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define i32 @vmask_popcount_i32_v4i16(<4 x i16> %a, <4 x i16> %b) {
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; CHECK-LABEL: vmask_popcount_i32_v4i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmgt v0.4h, v1.4h, v0.4h
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; CHECK-NEXT: addv h0, v0.4h
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; CHECK-NEXT: smov w8, v0.h[0]
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; CHECK-NEXT: neg w0, w8
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; CHECK-NEXT: ret
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%mask = icmp slt <4 x i16> %a, %b
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%t1 = bitcast <4 x i1> %mask to i4
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%t2 = call i4 @llvm.ctpop(i4 %t1)
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%t3 = zext i4 %t2 to i32
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ret i32 %t3
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}
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define i32 @vmask_popcount_i32_v8i16(<8 x i16> %a, <8 x i16> %b) {
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; CHECK-LABEL: vmask_popcount_i32_v8i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmgt v0.8h, v1.8h, v0.8h
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; CHECK-NEXT: addv h0, v0.8h
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; CHECK-NEXT: smov w8, v0.h[0]
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; CHECK-NEXT: neg w0, w8
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; CHECK-NEXT: ret
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%mask = icmp slt <8 x i16> %a, %b
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%t1 = bitcast <8 x i1> %mask to i8
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%t2 = call i8 @llvm.ctpop(i8 %t1)
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%t3 = zext i8 %t2 to i32
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ret i32 %t3
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}
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define i32 @vmask_popcount_i32_v2i32(<2 x i32> %a, <2 x i32> %b) {
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; CHECK-LABEL: vmask_popcount_i32_v2i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmgt v0.2s, v1.2s, v0.2s
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; CHECK-NEXT: addp v0.2s, v0.2s, v0.2s
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; CHECK-NEXT: fmov w8, s0
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; CHECK-NEXT: neg w0, w8
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; CHECK-NEXT: ret
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%mask = icmp slt <2 x i32> %a, %b
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%t1 = bitcast <2 x i1> %mask to i2
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%t2 = call i2 @llvm.ctpop(i2 %t1)
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%t3 = zext i2 %t2 to i32
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ret i32 %t3
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}
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define i32 @vmask_popcount_i32_v4i32(<4 x i32> %a, <4 x i32> %b) {
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; CHECK-LABEL: vmask_popcount_i32_v4i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmgt v0.4s, v1.4s, v0.4s
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; CHECK-NEXT: addv s0, v0.4s
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; CHECK-NEXT: fmov w8, s0
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; CHECK-NEXT: neg w0, w8
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; CHECK-NEXT: ret
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%mask = icmp slt <4 x i32> %a, %b
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%t1 = bitcast <4 x i1> %mask to i4
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%t2 = call i4 @llvm.ctpop(i4 %t1)
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%t3 = zext i4 %t2 to i32
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ret i32 %t3
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}
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define i32 @vmask_popcount_i32_v1i64(<1 x i64> %a, <1 x i64> %b) {
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; CHECK-LABEL: vmask_popcount_i32_v1i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-NEXT: fmov x8, d1
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; CHECK-NEXT: fmov x9, d0
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; CHECK-NEXT: cmp x9, x8
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; CHECK-NEXT: cset w0, lt
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; CHECK-NEXT: ret
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%mask = icmp slt <1 x i64> %a, %b
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%t1 = bitcast <1 x i1> %mask to i1
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%t2 = call i1 @llvm.ctpop(i1 %t1)
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%t3 = zext i1 %t2 to i32
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ret i32 %t3
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}
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define i32 @vmask_popcount_i32_v2i64(<2 x i64> %a, <2 x i64> %b) {
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; CHECK-LABEL: vmask_popcount_i32_v2i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmgt v0.2d, v1.2d, v0.2d
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; CHECK-NEXT: addp d0, v0.2d
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; CHECK-NEXT: fmov w8, s0
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; CHECK-NEXT: neg w0, w8
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; CHECK-NEXT: ret
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%mask = icmp slt <2 x i64> %a, %b
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%t1 = bitcast <2 x i1> %mask to i2
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%t2 = call i2 @llvm.ctpop(i2 %t1)
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%t3 = zext i2 %t2 to i32
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ret i32 %t3
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}
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define i64 @vmask_popcount_i64_v8i8(<8 x i8> %a, <8 x i8> %b) {
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; CHECK-LABEL: vmask_popcount_i64_v8i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmgt v0.8b, v1.8b, v0.8b
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; CHECK-NEXT: addv b0, v0.8b
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; CHECK-NEXT: smov w8, v0.b[0]
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; CHECK-NEXT: neg w0, w8
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; CHECK-NEXT: ret
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%mask = icmp slt <8 x i8> %a, %b
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%t1 = bitcast <8 x i1> %mask to i8
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%t2 = call i8 @llvm.ctpop(i8 %t1)
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%t3 = zext i8 %t2 to i64
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ret i64 %t3
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}
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define i64 @vmask_popcount_i64_v16i8(<16 x i8> %a, <16 x i8> %b) {
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; CHECK-LABEL: vmask_popcount_i64_v16i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmgt v0.16b, v1.16b, v0.16b
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; CHECK-NEXT: addv b0, v0.16b
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; CHECK-NEXT: smov w8, v0.b[0]
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; CHECK-NEXT: neg w0, w8
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; CHECK-NEXT: ret
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%mask = icmp slt <16 x i8> %a, %b
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%t1 = bitcast <16 x i1> %mask to i16
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%t2 = call i16 @llvm.ctpop(i16 %t1)
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%t3 = zext i16 %t2 to i64
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ret i64 %t3
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}
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define i64 @vmask_popcount_i64_v4i16(<4 x i16> %a, <4 x i16> %b) {
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; CHECK-LABEL: vmask_popcount_i64_v4i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmgt v0.4h, v1.4h, v0.4h
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; CHECK-NEXT: addv h0, v0.4h
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; CHECK-NEXT: smov w8, v0.h[0]
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; CHECK-NEXT: neg w0, w8
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; CHECK-NEXT: ret
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%mask = icmp slt <4 x i16> %a, %b
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%t1 = bitcast <4 x i1> %mask to i4
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%t2 = call i4 @llvm.ctpop(i4 %t1)
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%t3 = zext i4 %t2 to i64
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ret i64 %t3
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}
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define i64 @vmask_popcount_i64_v8i16(<8 x i16> %a, <8 x i16> %b) {
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; CHECK-LABEL: vmask_popcount_i64_v8i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmgt v0.8h, v1.8h, v0.8h
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; CHECK-NEXT: addv h0, v0.8h
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; CHECK-NEXT: smov w8, v0.h[0]
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; CHECK-NEXT: neg w0, w8
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; CHECK-NEXT: ret
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%mask = icmp slt <8 x i16> %a, %b
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%t1 = bitcast <8 x i1> %mask to i8
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%t2 = call i8 @llvm.ctpop(i8 %t1)
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%t3 = zext i8 %t2 to i64
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ret i64 %t3
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}
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define i64 @vmask_popcount_i64_v2i32(<2 x i32> %a, <2 x i32> %b) {
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; CHECK-LABEL: vmask_popcount_i64_v2i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmgt v0.2s, v1.2s, v0.2s
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; CHECK-NEXT: addp v0.2s, v0.2s, v0.2s
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; CHECK-NEXT: fmov w8, s0
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; CHECK-NEXT: neg w0, w8
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; CHECK-NEXT: ret
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%mask = icmp slt <2 x i32> %a, %b
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%t1 = bitcast <2 x i1> %mask to i2
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%t2 = call i2 @llvm.ctpop(i2 %t1)
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%t3 = zext i2 %t2 to i64
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ret i64 %t3
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}
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define i64 @vmask_popcount_i64_v4i32(<4 x i32> %a, <4 x i32> %b) {
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; CHECK-LABEL: vmask_popcount_i64_v4i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmgt v0.4s, v1.4s, v0.4s
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; CHECK-NEXT: addv s0, v0.4s
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; CHECK-NEXT: fmov w8, s0
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; CHECK-NEXT: neg w0, w8
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; CHECK-NEXT: ret
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%mask = icmp slt <4 x i32> %a, %b
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%t1 = bitcast <4 x i1> %mask to i4
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%t2 = call i4 @llvm.ctpop(i4 %t1)
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%t3 = zext i4 %t2 to i64
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ret i64 %t3
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}
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define i64 @vmask_popcount_i64_v1i64(<1 x i64> %a, <1 x i64> %b) {
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; CHECK-LABEL: vmask_popcount_i64_v1i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-NEXT: fmov x8, d1
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; CHECK-NEXT: fmov x9, d0
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; CHECK-NEXT: cmp x9, x8
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; CHECK-NEXT: cset w0, lt
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; CHECK-NEXT: ret
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%mask = icmp slt <1 x i64> %a, %b
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%t1 = bitcast <1 x i1> %mask to i1
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%t2 = call i1 @llvm.ctpop(i1 %t1)
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%t3 = zext i1 %t2 to i64
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ret i64 %t3
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}
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define i64 @vmask_popcount_i64_v2i64(<2 x i64> %a, <2 x i64> %b) {
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; CHECK-LABEL: vmask_popcount_i64_v2i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmgt v0.2d, v1.2d, v0.2d
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; CHECK-NEXT: addp d0, v0.2d
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; CHECK-NEXT: fmov w8, s0
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; CHECK-NEXT: neg w0, w8
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; CHECK-NEXT: ret
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%mask = icmp slt <2 x i64> %a, %b
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%t1 = bitcast <2 x i1> %mask to i2
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%t2 = call i2 @llvm.ctpop(i2 %t1)
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%t3 = zext i2 %t2 to i64
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ret i64 %t3
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}
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define i32 @non_vmask_popcount_1(half %a) {
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; CHECK-LABEL: non_vmask_popcount_1:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $h0 killed $h0 def $s0
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; CHECK-NEXT: fmov w8, s0
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; CHECK-NEXT: and w8, w8, #0xffff
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; CHECK-NEXT: fmov s0, w8
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; CHECK-NEXT: cnt v0.8b, v0.8b
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; CHECK-NEXT: addv b0, v0.8b
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; CHECK-NEXT: fmov w0, s0
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; CHECK-NEXT: ret
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%t1 = bitcast half %a to i16
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%t2 = call i16 @llvm.ctpop(i16 %t1)
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%t3 = zext i16 %t2 to i32
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ret i32 %t3
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}
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define i32 @non_vmask_popcount_2(<8 x i16> %a) {
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; CHECK-LABEL: non_vmask_popcount_2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: sub sp, sp, #16
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: xtn v0.8b, v0.8h
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; CHECK-NEXT: umov w8, v0.b[0]
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; CHECK-NEXT: umov w9, v0.b[1]
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; CHECK-NEXT: umov w10, v0.b[2]
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; CHECK-NEXT: and w8, w8, #0x3
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; CHECK-NEXT: bfi w8, w9, #2, #2
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; CHECK-NEXT: umov w9, v0.b[3]
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; CHECK-NEXT: bfi w8, w10, #4, #2
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; CHECK-NEXT: umov w10, v0.b[4]
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; CHECK-NEXT: bfi w8, w9, #6, #2
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; CHECK-NEXT: umov w9, v0.b[5]
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; CHECK-NEXT: bfi w8, w10, #8, #2
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; CHECK-NEXT: umov w10, v0.b[6]
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; CHECK-NEXT: bfi w8, w9, #10, #2
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; CHECK-NEXT: umov w9, v0.b[7]
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; CHECK-NEXT: bfi w8, w10, #12, #2
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; CHECK-NEXT: orr w8, w8, w9, lsl #14
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; CHECK-NEXT: and w8, w8, #0xffff
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; CHECK-NEXT: fmov s0, w8
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; CHECK-NEXT: cnt v0.8b, v0.8b
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; CHECK-NEXT: addv b0, v0.8b
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; CHECK-NEXT: fmov w0, s0
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; CHECK-NEXT: add sp, sp, #16
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; CHECK-NEXT: ret
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%mask = trunc <8 x i16> %a to <8 x i2>
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%t1 = bitcast <8 x i2> %mask to i16
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%t2 = call i16 @llvm.ctpop(i16 %t1)
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%t3 = zext i16 %t2 to i32
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ret i32 %t3
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}
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define i32 @vmask_negate_popcount(<16 x i8> %a, <16 x i8> %b) {
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; CHECK-LABEL: vmask_negate_popcount:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmeq v0.16b, v0.16b, v1.16b
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; CHECK-NEXT: addv b0, v0.16b
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; CHECK-NEXT: smov w0, v0.b[0]
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; CHECK-NEXT: ret
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%mask = icmp eq <16 x i8> %a, %b
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%t1 = bitcast <16 x i1> %mask to i16
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%t2 = tail call i16 @llvm.ctpop.i16(i16 %t1)
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%t3 = sub i16 0, %t2
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%t4 = sext i16 %t3 to i32
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ret i32 %t4
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}
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define i32 @vmask_popcount_i32_v8i1(<8 x i1> %a, <8 x i1> %b) {
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; CHECK-LABEL: vmask_popcount_i32_v8i1:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi v2.8b, #1
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; CHECK-NEXT: eor v0.8b, v0.8b, v1.8b
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; CHECK-NEXT: eor v0.8b, v0.8b, v2.8b
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; CHECK-NEXT: shl v0.8b, v0.8b, #7
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; CHECK-NEXT: cmlt v0.8b, v0.8b, #0
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; CHECK-NEXT: addv b0, v0.8b
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; CHECK-NEXT: smov w8, v0.b[0]
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; CHECK-NEXT: neg w0, w8
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; CHECK-NEXT: ret
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%mask = icmp eq <8 x i1> %a, %b
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%t1 = bitcast <8 x i1> %mask to i8
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%t2 = call i8 @llvm.ctpop(i8 %t1)
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%t3 = zext i8 %t2 to i32
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ret i32 %t3
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}
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