derek.holloway
7502bf64a4
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98 lines
2.8 KiB
LLVM
98 lines
2.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc -O3 < %s -mtriple=aarch64 | FileCheck %s
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; The seemingly redundant wreg mov where src_reg == dst_reg shouldn't be
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; removed, because it has the effect of zeroing the upper bits in the matching
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; xreg.
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define i32 @widget(i32 %arg, i32 %arg1, i1 %arg2, ptr %arg3, i1 %arg4) #0 nounwind {
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; CHECK-LABEL: widget:
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; CHECK: // %bb.0: // %bb
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; CHECK-NEXT: tbz w2, #0, .LBB0_2
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; CHECK-NEXT: // %bb.1:
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; CHECK-NEXT: mov w0, #1 // =0x1
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB0_2: // %bb5
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; CHECK-NEXT: tbz w4, #0, .LBB0_4
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; CHECK-NEXT: // %bb.3:
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; CHECK-NEXT: mov w0, #0 // =0x0
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB0_4: // %bb6
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; CHECK-NEXT: str x30, [sp, #-48]! // 8-byte Folded Spill
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; CHECK-NEXT: stp x22, x21, [sp, #16] // 16-byte Folded Spill
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; CHECK-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
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; CHECK-NEXT: mov x19, x3
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; CHECK-NEXT: mov x20, x0
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; CHECK-NEXT: mov x21, x1
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; CHECK-NEXT: bl baz
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; CHECK-NEXT: mov w0, #0 // =0x0
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; CHECK-NEXT: mov w10, #1 // =0x1
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; CHECK-NEXT: cbnz w10, .LBB0_10
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; CHECK-NEXT: // %bb.5: // %bb7
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; CHECK-NEXT: cbnz w10, .LBB0_9
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; CHECK-NEXT: // %bb.6: // %bb8
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; CHECK-NEXT: mov x8, x21
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; CHECK-NEXT: mov x9, x20
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; CHECK-NEXT: mov w20, #0 // =0x0
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; CHECK-NEXT: mov w9, w9
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; CHECK-NEXT: mov x21, x9
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; CHECK-NEXT: mov w8, w8
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; CHECK-NEXT: mov x22, x8
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; CHECK-NEXT: .LBB0_7: // %bb10
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: strb w20, [x19]
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; CHECK-NEXT: cbnz x21, .LBB0_7
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; CHECK-NEXT: // %bb.8: // %bb12
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; CHECK-NEXT: // in Loop: Header=BB0_7 Depth=1
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; CHECK-NEXT: bl snork
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; CHECK-NEXT: cbnz x22, .LBB0_7
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; CHECK-NEXT: .LBB0_9:
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; CHECK-NEXT: mov w0, #0 // =0x0
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; CHECK-NEXT: .LBB0_10:
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; CHECK-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
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; CHECK-NEXT: ldp x22, x21, [sp, #16] // 16-byte Folded Reload
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; CHECK-NEXT: ldr x30, [sp], #48 // 8-byte Folded Reload
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; CHECK-NEXT: ret
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bb:
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br i1 %arg2, label %bb14, label %bb5
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bb5:
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%load = load ptr, ptr null, align 8
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br i1 %arg4, label %bb14, label %bb6
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bb6:
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%call = call i32 @baz() #1
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%or = or i1 false, true
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br i1 %or, label %bb14, label %bb7
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bb7:
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%icmp = icmp eq i32 0, 0
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%zext = zext i32 %arg to i64
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br i1 %icmp, label %bb14, label %bb8
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bb8:
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%zext9 = zext i32 %arg1 to i64
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br label %bb10
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bb10:
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store i8 0, ptr %arg3, align 1
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%icmp11 = icmp eq i64 %zext, 0
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br i1 %icmp11, label %bb12, label %bb10
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bb12:
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call void @snork()
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%icmp13 = icmp eq i64 0, %zext9
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br i1 %icmp13, label %bb14, label %bb10
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bb14:
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%phi = phi i32 [ 0, %bb6 ], [ 0, %bb7 ], [ 0, %bb12 ], [ 1, %bb ], [ 0, %bb5 ]
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ret i32 %phi
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}
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declare i32 @baz()
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declare void @snork()
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attributes #0 = { "target-cpu"="apple-m1" }
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attributes #1 = { returns_twice }
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