derek.holloway
7502bf64a4
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64 lines
2.6 KiB
LLVM
64 lines
2.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-linux-unknown -mattr=+sve -o - < %s | FileCheck %s
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define <vscale x 16 x i8> @vselect_cmp_ne(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c) {
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; CHECK-LABEL: vselect_cmp_ne:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.b
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; CHECK-NEXT: cmpne p1.b, p0/z, z0.b, z1.b
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; CHECK-NEXT: sel z0.b, p1, z1.b, z2.b
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; CHECK-NEXT: ret
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%cmp = icmp ne <vscale x 16 x i8> %a, %b
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%d = select <vscale x 16 x i1> %cmp, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c
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ret <vscale x 16 x i8> %d
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}
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define <vscale x 16 x i8> @vselect_cmp_sgt(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c) {
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; CHECK-LABEL: vselect_cmp_sgt:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.b
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; CHECK-NEXT: cmpgt p1.b, p0/z, z0.b, z1.b
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; CHECK-NEXT: sel z0.b, p1, z1.b, z2.b
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; CHECK-NEXT: ret
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%cmp = icmp sgt <vscale x 16 x i8> %a, %b
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%d = select <vscale x 16 x i1> %cmp, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c
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ret <vscale x 16 x i8> %d
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}
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define <vscale x 16 x i8> @vselect_cmp_ugt(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c) {
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; CHECK-LABEL: vselect_cmp_ugt:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.b
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; CHECK-NEXT: cmphi p1.b, p0/z, z0.b, z1.b
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; CHECK-NEXT: sel z0.b, p1, z1.b, z2.b
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; CHECK-NEXT: ret
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%cmp = icmp ugt <vscale x 16 x i8> %a, %b
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%d = select <vscale x 16 x i1> %cmp, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c
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ret <vscale x 16 x i8> %d
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}
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; Some folds to remove a redundant icmp if the original input was a predicate vector.
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define <vscale x 4 x i1> @fold_away_icmp_ptrue_all(<vscale x 4 x i1> %p) {
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; CHECK-LABEL: fold_away_icmp_ptrue_all:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ret
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%t0 = sext <vscale x 4 x i1> %p to <vscale x 4 x i32>
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%t1 = icmp ne <vscale x 4 x i32> %t0, zeroinitializer
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ret <vscale x 4 x i1> %t1
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}
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define <vscale x 4 x i1> @fold_away_icmp_ptrue_vl16(<vscale x 4 x i1> %p) vscale_range(4, 4) {
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; CHECK-LABEL: fold_away_icmp_ptrue_vl16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ret
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%t0 = call <vscale x 4 x i1> @llvm.aarch64.sve.ptrue.nxv4i1(i32 9) ; VL16 is encoded as 9.
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%t1 = sext <vscale x 4 x i1> %p to <vscale x 4 x i32>
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%t2 = call <vscale x 4 x i1> @llvm.aarch64.sve.cmpne.nxv4i32(<vscale x 4 x i1> %t0, <vscale x 4 x i32> %t1, <vscale x 4 x i32> zeroinitializer)
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ret <vscale x 4 x i1> %t2
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}
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declare <vscale x 4 x i1> @llvm.aarch64.sve.ptrue.nxv4i1(i32)
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declare <vscale x 4 x i1> @llvm.aarch64.sve.cmpne.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 4 x i32>)
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