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105 lines
4.1 KiB
LLVM
105 lines
4.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc -global-isel -new-reg-bank-select -new-reg-bank-select -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefix=GCN %s
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@flat = external global i32, align 4
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@global = external addrspace(1) global i32, align 4
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@lds = addrspace(3) global i32 poison, align 4
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@constant = external addrspace(4) constant i32, align 4
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@buf = external addrspace(8) global i8
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define ptr @global_value_as0_external() {
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; GCN-LABEL: global_value_as0_external:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: s_getpc_b64 s[4:5]
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; GCN-NEXT: s_add_u32 s4, s4, flat@gotpcrel32@lo+4
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; GCN-NEXT: s_addc_u32 s5, s5, flat@gotpcrel32@hi+12
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; GCN-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
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; GCN-NEXT: s_waitcnt lgkmcnt(0)
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; GCN-NEXT: v_mov_b32_e32 v0, s4
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; GCN-NEXT: v_mov_b32_e32 v1, s5
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; GCN-NEXT: s_setpc_b64 s[30:31]
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ret ptr @flat
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}
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define ptr addrspace(1) @global_value_as1_external() {
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; GCN-LABEL: global_value_as1_external:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: s_getpc_b64 s[4:5]
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; GCN-NEXT: s_add_u32 s4, s4, global@gotpcrel32@lo+4
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; GCN-NEXT: s_addc_u32 s5, s5, global@gotpcrel32@hi+12
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; GCN-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
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; GCN-NEXT: s_waitcnt lgkmcnt(0)
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; GCN-NEXT: v_mov_b32_e32 v0, s4
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; GCN-NEXT: v_mov_b32_e32 v1, s5
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; GCN-NEXT: s_setpc_b64 s[30:31]
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ret ptr addrspace(1) @global
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}
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define ptr addrspace(4) @global_value_as4_external() {
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; GCN-LABEL: global_value_as4_external:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: s_getpc_b64 s[4:5]
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; GCN-NEXT: s_add_u32 s4, s4, constant@gotpcrel32@lo+4
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; GCN-NEXT: s_addc_u32 s5, s5, constant@gotpcrel32@hi+12
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; GCN-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
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; GCN-NEXT: s_waitcnt lgkmcnt(0)
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; GCN-NEXT: v_mov_b32_e32 v0, s4
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; GCN-NEXT: v_mov_b32_e32 v1, s5
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; GCN-NEXT: s_setpc_b64 s[30:31]
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ret ptr addrspace(4) @constant
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}
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define amdgpu_kernel void @global_value_as3_lds_kernel(ptr addrspace(1) %out) {
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; GCN-LABEL: global_value_as3_lds_kernel:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
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; GCN-NEXT: v_mov_b32_e32 v0, 0
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; GCN-NEXT: s_waitcnt lgkmcnt(0)
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; GCN-NEXT: global_store_dword v0, v0, s[0:1]
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; GCN-NEXT: s_endpgm
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%addr = ptrtoint ptr addrspace(3) @lds to i32
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store i32 %addr, ptr addrspace(1) %out
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ret void
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}
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define void @global_value_as8_buffer_store(i32 %val) {
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; GCN-LABEL: global_value_as8_buffer_store:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: s_getpc_b64 s[8:9]
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; GCN-NEXT: s_add_u32 s8, s8, buf@gotpcrel32@lo+4
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; GCN-NEXT: s_addc_u32 s9, s9, buf@gotpcrel32@hi+12
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; GCN-NEXT: s_load_dwordx4 s[4:7], s[8:9], 0x0
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; GCN-NEXT: s_waitcnt lgkmcnt(0)
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; GCN-NEXT: buffer_store_dword v0, off, s[4:7], 0
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; GCN-NEXT: s_waitcnt vmcnt(0)
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; GCN-NEXT: s_setpc_b64 s[30:31]
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call void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32 %val, ptr addrspace(8) @buf, i32 0, i32 0, i32 0)
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ret void
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}
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define i32 @global_value_as8_buffer_load(i32 %offset) {
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; GCN-LABEL: global_value_as8_buffer_load:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: s_getpc_b64 s[8:9]
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; GCN-NEXT: s_add_u32 s8, s8, buf@gotpcrel32@lo+4
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; GCN-NEXT: s_addc_u32 s9, s9, buf@gotpcrel32@hi+12
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; GCN-NEXT: s_load_dwordx4 s[4:7], s[8:9], 0x0
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; GCN-NEXT: s_waitcnt lgkmcnt(0)
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; GCN-NEXT: buffer_load_dword v0, v0, s[4:7], 0 offen
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; GCN-NEXT: s_waitcnt vmcnt(0)
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; GCN-NEXT: s_setpc_b64 s[30:31]
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%val = call i32 @llvm.amdgcn.raw.ptr.buffer.load.i32(ptr addrspace(8) @buf, i32 %offset, i32 0, i32 0)
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ret i32 %val
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}
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declare void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32, ptr addrspace(8) nocapture writeonly, i32, i32, i32 immarg) #0
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declare i32 @llvm.amdgcn.raw.ptr.buffer.load.i32(ptr addrspace(8) nocapture readonly, i32, i32, i32 immarg) #1
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attributes #0 = { nocallback nofree nosync nounwind willreturn memory(argmem: write) }
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attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: read) }
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