TheRock/compiler/amd-llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-abs.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX6 %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX9 %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX9 %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX9 %s

---
name: smax_neg_abs_pattern_s32_ss
legalized: true
regBankSelected: true
tracksRegLiveness: true

body: |
  bb.0:
    liveins: $sgpr0

    ; GFX6-LABEL: name: smax_neg_abs_pattern_s32_ss
    ; GFX6: liveins: $sgpr0
    ; GFX6-NEXT: {{  $}}
    ; GFX6-NEXT: %src0:sreg_32 = COPY $sgpr0
    ; GFX6-NEXT: %smax:sreg_32 = S_ABS_I32 %src0, implicit-def dead $scc
    ; GFX6-NEXT: S_ENDPGM 0, implicit %smax
    ;
    ; GFX9-LABEL: name: smax_neg_abs_pattern_s32_ss
    ; GFX9: liveins: $sgpr0
    ; GFX9-NEXT: {{  $}}
    ; GFX9-NEXT: %src0:sreg_32 = COPY $sgpr0
    ; GFX9-NEXT: %smax:sreg_32 = S_ABS_I32 %src0, implicit-def dead $scc
    ; GFX9-NEXT: S_ENDPGM 0, implicit %smax
    %src0:sgpr(s32) = COPY $sgpr0
    %zero:sgpr(s32) = G_CONSTANT i32 0
    %ineg:sgpr(s32) = G_SUB %zero, %src0
    %smax:sgpr(s32) = G_SMAX %src0, %ineg
    S_ENDPGM 0, implicit %smax
...

---
name: smax_neg_abs_pattern_s32_ss_commute
legalized: true
regBankSelected: true
tracksRegLiveness: true

body: |
  bb.0:
    liveins: $sgpr0

    ; GFX6-LABEL: name: smax_neg_abs_pattern_s32_ss_commute
    ; GFX6: liveins: $sgpr0
    ; GFX6-NEXT: {{  $}}
    ; GFX6-NEXT: %src0:sreg_32 = COPY $sgpr0
    ; GFX6-NEXT: %smax:sreg_32 = S_ABS_I32 %src0, implicit-def dead $scc
    ; GFX6-NEXT: S_ENDPGM 0, implicit %smax
    ;
    ; GFX9-LABEL: name: smax_neg_abs_pattern_s32_ss_commute
    ; GFX9: liveins: $sgpr0
    ; GFX9-NEXT: {{  $}}
    ; GFX9-NEXT: %src0:sreg_32 = COPY $sgpr0
    ; GFX9-NEXT: %smax:sreg_32 = S_ABS_I32 %src0, implicit-def dead $scc
    ; GFX9-NEXT: S_ENDPGM 0, implicit %smax
    %src0:sgpr(s32) = COPY $sgpr0
    %zero:sgpr(s32) = G_CONSTANT i32 0
    %ineg:sgpr(s32) = G_SUB %zero, %src0
    %smax:sgpr(s32) = G_SMAX %ineg, %src0
    S_ENDPGM 0, implicit %smax
...

---
name: smax_neg_abs_pattern_s32_vv
legalized: true
regBankSelected: true
tracksRegLiveness: true

body: |
  bb.0:
    liveins: $vgpr0

    ; GFX6-LABEL: name: smax_neg_abs_pattern_s32_vv
    ; GFX6: liveins: $vgpr0
    ; GFX6-NEXT: {{  $}}
    ; GFX6-NEXT: %src0:vgpr_32 = COPY $vgpr0
    ; GFX6-NEXT: %zero:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
    ; GFX6-NEXT: %ineg:vgpr_32, dead %4:sreg_64 = V_SUB_CO_U32_e64 %zero, %src0, 0, implicit $exec
    ; GFX6-NEXT: %smax:vgpr_32 = V_MAX_I32_e64 %src0, %ineg, implicit $exec
    ; GFX6-NEXT: S_ENDPGM 0, implicit %smax
    ;
    ; GFX9-LABEL: name: smax_neg_abs_pattern_s32_vv
    ; GFX9: liveins: $vgpr0
    ; GFX9-NEXT: {{  $}}
    ; GFX9-NEXT: %src0:vgpr_32 = COPY $vgpr0
    ; GFX9-NEXT: %zero:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
    ; GFX9-NEXT: %ineg:vgpr_32 = V_SUB_U32_e64 %zero, %src0, 0, implicit $exec
    ; GFX9-NEXT: %smax:vgpr_32 = V_MAX_I32_e64 %src0, %ineg, implicit $exec
    ; GFX9-NEXT: S_ENDPGM 0, implicit %smax
    %src0:vgpr(s32) = COPY $vgpr0
    %zero:vgpr(s32) = G_CONSTANT i32 0
    %ineg:vgpr(s32) = G_SUB %zero, %src0
    %smax:vgpr(s32) = G_SMAX %src0, %ineg
    S_ENDPGM 0, implicit %smax
...

# FIXME: Violates constant bus restriction
# ---
# name: smax_neg_abs_pattern_s32_vs
# legalized: true
# regBankSelected: true

# body: |
#   bb.0:
#     liveins: $sgpr0

#     %src0:sgpr(s32) = COPY $sgpr0
#     %zero:sgpr(s32) = G_CONSTANT i32 0
#     %ineg:sgpr(s32) = G_SUB %zero, %src0
#     %smax:vgpr(s32) = G_SMAX %src0, %ineg
#     S_ENDPGM 0, implicit %smax
# ...