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46 lines
1.4 KiB
YAML
46 lines
1.4 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
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# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
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---
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name: sin_s32_vs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0
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; CHECK-LABEL: name: sin_s32_vs
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; CHECK: liveins: $sgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; CHECK-NEXT: %1:vgpr_32 = nofpexcept V_SIN_F32_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; CHECK-NEXT: S_ENDPGM 0, implicit %1
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%0:sgpr(s32) = COPY $sgpr0
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%1:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.sin), %0
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S_ENDPGM 0, implicit %1
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...
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---
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name: sin_s32_vv
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: sin_s32_vv
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; CHECK: liveins: $vgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; CHECK-NEXT: %1:vgpr_32 = nofpexcept V_SIN_F32_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; CHECK-NEXT: S_ENDPGM 0, implicit %1
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.sin), %0
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S_ENDPGM 0, implicit %1
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...
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