derek.holloway
7502bf64a4
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542 lines
19 KiB
LLVM
542 lines
19 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdpal -mcpu=hawaii < %s | FileCheck -check-prefix=GFX7 %s
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; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 < %s | FileCheck -check-prefix=GFX9 %s
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; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdpal -mcpu=fiji < %s | FileCheck -check-prefix=GFX8 %s
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; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdpal -mcpu=gfx1010 < %s | FileCheck -check-prefix=GFX10 %s
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; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefix=GFX11 %s
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; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdpal -mcpu=gfx1200 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefix=GFX12 %s
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define i16 @s_sub_i16(i16 inreg %a, i16 inreg %b) {
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; GFX7-LABEL: s_sub_i16:
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; GFX7: ; %bb.0:
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; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-NEXT: s_sub_i32 s4, s16, s17
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; GFX7-NEXT: v_mov_b32_e32 v0, s4
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; GFX7-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX9-LABEL: s_sub_i16:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: s_sub_i32 s4, s16, s17
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; GFX9-NEXT: v_mov_b32_e32 v0, s4
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX8-LABEL: s_sub_i16:
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; GFX8: ; %bb.0:
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; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX8-NEXT: s_sub_i32 s4, s16, s17
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; GFX8-NEXT: v_mov_b32_e32 v0, s4
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; GFX8-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX10-LABEL: s_sub_i16:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: s_sub_i32 s4, s16, s17
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; GFX10-NEXT: v_mov_b32_e32 v0, s4
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX11-LABEL: s_sub_i16:
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; GFX11: ; %bb.0:
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; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX11-NEXT: s_sub_i32 s0, s0, s1
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; GFX11-NEXT: v_mov_b32_e32 v0, s0
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; GFX11-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX12-LABEL: s_sub_i16:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX12-NEXT: s_wait_expcnt 0x0
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; GFX12-NEXT: s_wait_samplecnt 0x0
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; GFX12-NEXT: s_wait_bvhcnt 0x0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: s_sub_co_i32 s0, s0, s1
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; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
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; GFX12-NEXT: v_mov_b32_e32 v0, s0
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; GFX12-NEXT: s_setpc_b64 s[30:31]
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%c = sub i16 %a, %b
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ret i16 %c
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}
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define i16 @v_sub_i16(i16 %a, i16 %b) {
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; GFX7-LABEL: v_sub_i16:
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; GFX7: ; %bb.0:
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; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-NEXT: v_sub_i32_e32 v0, vcc, v0, v1
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; GFX7-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX9-LABEL: v_sub_i16:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: v_sub_u16_e32 v0, v0, v1
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX8-LABEL: v_sub_i16:
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; GFX8: ; %bb.0:
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; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX8-NEXT: v_sub_u16_e32 v0, v0, v1
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; GFX8-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX10-LABEL: v_sub_i16:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: v_sub_nc_u16 v0, v0, v1
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX11-LABEL: v_sub_i16:
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; GFX11: ; %bb.0:
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; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX11-NEXT: v_sub_nc_u16 v0.l, v0.l, v1.l
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; GFX11-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX12-LABEL: v_sub_i16:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX12-NEXT: s_wait_expcnt 0x0
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; GFX12-NEXT: s_wait_samplecnt 0x0
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; GFX12-NEXT: s_wait_bvhcnt 0x0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_sub_nc_u16 v0.l, v0.l, v1.l
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; GFX12-NEXT: s_setpc_b64 s[30:31]
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%c = sub i16 %a, %b
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ret i16 %c
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}
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define i32 @s_sub_i32(i32 inreg %a, i32 inreg %b) {
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; GFX7-LABEL: s_sub_i32:
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; GFX7: ; %bb.0:
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; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-NEXT: s_sub_i32 s4, s16, s17
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; GFX7-NEXT: v_mov_b32_e32 v0, s4
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; GFX7-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX9-LABEL: s_sub_i32:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: s_sub_i32 s4, s16, s17
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; GFX9-NEXT: v_mov_b32_e32 v0, s4
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX8-LABEL: s_sub_i32:
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; GFX8: ; %bb.0:
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; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX8-NEXT: s_sub_i32 s4, s16, s17
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; GFX8-NEXT: v_mov_b32_e32 v0, s4
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; GFX8-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX10-LABEL: s_sub_i32:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: s_sub_i32 s4, s16, s17
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; GFX10-NEXT: v_mov_b32_e32 v0, s4
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX11-LABEL: s_sub_i32:
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; GFX11: ; %bb.0:
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; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX11-NEXT: s_sub_i32 s0, s0, s1
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; GFX11-NEXT: v_mov_b32_e32 v0, s0
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; GFX11-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX12-LABEL: s_sub_i32:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX12-NEXT: s_wait_expcnt 0x0
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; GFX12-NEXT: s_wait_samplecnt 0x0
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; GFX12-NEXT: s_wait_bvhcnt 0x0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: s_sub_co_i32 s0, s0, s1
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; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
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; GFX12-NEXT: v_mov_b32_e32 v0, s0
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; GFX12-NEXT: s_setpc_b64 s[30:31]
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%c = sub i32 %a, %b
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ret i32 %c
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}
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define i32 @v_sub_i32(i32 %a, i32 %b) {
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; GFX7-LABEL: v_sub_i32:
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; GFX7: ; %bb.0:
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; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-NEXT: v_sub_i32_e32 v0, vcc, v0, v1
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; GFX7-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX9-LABEL: v_sub_i32:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: v_sub_u32_e32 v0, v0, v1
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX8-LABEL: v_sub_i32:
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; GFX8: ; %bb.0:
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; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX8-NEXT: v_sub_u32_e32 v0, vcc, v0, v1
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; GFX8-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX10-LABEL: v_sub_i32:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: v_sub_nc_u32_e32 v0, v0, v1
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX11-LABEL: v_sub_i32:
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; GFX11: ; %bb.0:
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; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX11-NEXT: v_sub_nc_u32_e32 v0, v0, v1
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; GFX11-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX12-LABEL: v_sub_i32:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX12-NEXT: s_wait_expcnt 0x0
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; GFX12-NEXT: s_wait_samplecnt 0x0
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; GFX12-NEXT: s_wait_bvhcnt 0x0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_sub_nc_u32_e32 v0, v0, v1
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; GFX12-NEXT: s_setpc_b64 s[30:31]
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%c = sub i32 %a, %b
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ret i32 %c
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}
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; TODO: Add test for s_sub_v2i16. Instruction selector currently fails
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; to handle G_UNMERGE_VALUES.
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define <2 x i16> @v_sub_v2i16(<2 x i16> %a, <2 x i16> %b) {
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; GFX7-LABEL: v_sub_v2i16:
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; GFX7: ; %bb.0:
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; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
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; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v1
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; GFX7-NEXT: v_sub_i32_e32 v0, vcc, v0, v1
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; GFX7-NEXT: v_sub_i32_e32 v1, vcc, v2, v3
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; GFX7-NEXT: v_and_b32_e32 v1, 0xffff, v1
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; GFX7-NEXT: v_and_b32_e32 v0, 0xffff, v0
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; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1
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; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
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; GFX7-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX9-LABEL: v_sub_v2i16:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: v_pk_sub_i16 v0, v0, v1
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX8-LABEL: v_sub_v2i16:
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; GFX8: ; %bb.0:
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; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX8-NEXT: v_sub_u16_e32 v2, v0, v1
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; GFX8-NEXT: v_sub_u16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
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; GFX8-NEXT: v_or_b32_e32 v0, v2, v0
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; GFX8-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX10-LABEL: v_sub_v2i16:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: v_pk_sub_i16 v0, v0, v1
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX11-LABEL: v_sub_v2i16:
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; GFX11: ; %bb.0:
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; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX11-NEXT: v_pk_sub_i16 v0, v0, v1
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; GFX11-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX12-LABEL: v_sub_v2i16:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX12-NEXT: s_wait_expcnt 0x0
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; GFX12-NEXT: s_wait_samplecnt 0x0
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; GFX12-NEXT: s_wait_bvhcnt 0x0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_pk_sub_i16 v0, v0, v1
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; GFX12-NEXT: s_setpc_b64 s[30:31]
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%c = sub <2 x i16> %a, %b
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ret <2 x i16> %c
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}
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define i64 @s_sub_i64(i64 inreg %a, i64 inreg %b) {
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; GFX7-LABEL: s_sub_i64:
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; GFX7: ; %bb.0:
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; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-NEXT: s_sub_u32 s4, s16, s18
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; GFX7-NEXT: s_subb_u32 s5, s17, s19
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; GFX7-NEXT: v_mov_b32_e32 v0, s4
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; GFX7-NEXT: v_mov_b32_e32 v1, s5
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; GFX7-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX9-LABEL: s_sub_i64:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: s_sub_u32 s4, s16, s18
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; GFX9-NEXT: s_subb_u32 s5, s17, s19
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; GFX9-NEXT: v_mov_b32_e32 v0, s4
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; GFX9-NEXT: v_mov_b32_e32 v1, s5
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX8-LABEL: s_sub_i64:
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; GFX8: ; %bb.0:
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; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX8-NEXT: s_sub_u32 s4, s16, s18
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; GFX8-NEXT: s_subb_u32 s5, s17, s19
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; GFX8-NEXT: v_mov_b32_e32 v0, s4
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; GFX8-NEXT: v_mov_b32_e32 v1, s5
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; GFX8-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX10-LABEL: s_sub_i64:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: s_sub_u32 s4, s16, s18
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|
; GFX10-NEXT: s_subb_u32 s5, s17, s19
|
|
; GFX10-NEXT: v_mov_b32_e32 v0, s4
|
|
; GFX10-NEXT: v_mov_b32_e32 v1, s5
|
|
; GFX10-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GFX11-LABEL: s_sub_i64:
|
|
; GFX11: ; %bb.0:
|
|
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GFX11-NEXT: s_sub_u32 s0, s0, s2
|
|
; GFX11-NEXT: s_subb_u32 s1, s1, s3
|
|
; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
|
|
; GFX11-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GFX12-LABEL: s_sub_i64:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
|
|
; GFX12-NEXT: s_wait_expcnt 0x0
|
|
; GFX12-NEXT: s_wait_samplecnt 0x0
|
|
; GFX12-NEXT: s_wait_bvhcnt 0x0
|
|
; GFX12-NEXT: s_wait_kmcnt 0x0
|
|
; GFX12-NEXT: s_sub_nc_u64 s[0:1], s[0:1], s[2:3]
|
|
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
|
|
; GFX12-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
|
|
; GFX12-NEXT: s_setpc_b64 s[30:31]
|
|
%c = sub i64 %a, %b
|
|
ret i64 %c
|
|
}
|
|
|
|
define i64 @v_sub_i64(i64 %a, i64 %b) {
|
|
; GFX7-LABEL: v_sub_i64:
|
|
; GFX7: ; %bb.0:
|
|
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GFX7-NEXT: v_sub_i32_e32 v0, vcc, v0, v2
|
|
; GFX7-NEXT: v_subb_u32_e32 v1, vcc, v1, v3, vcc
|
|
; GFX7-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GFX9-LABEL: v_sub_i64:
|
|
; GFX9: ; %bb.0:
|
|
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GFX9-NEXT: v_sub_co_u32_e32 v0, vcc, v0, v2
|
|
; GFX9-NEXT: v_subb_co_u32_e32 v1, vcc, v1, v3, vcc
|
|
; GFX9-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GFX8-LABEL: v_sub_i64:
|
|
; GFX8: ; %bb.0:
|
|
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GFX8-NEXT: v_sub_u32_e32 v0, vcc, v0, v2
|
|
; GFX8-NEXT: v_subb_u32_e32 v1, vcc, v1, v3, vcc
|
|
; GFX8-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GFX10-LABEL: v_sub_i64:
|
|
; GFX10: ; %bb.0:
|
|
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GFX10-NEXT: v_sub_co_u32 v0, vcc_lo, v0, v2
|
|
; GFX10-NEXT: v_sub_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo
|
|
; GFX10-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GFX11-LABEL: v_sub_i64:
|
|
; GFX11: ; %bb.0:
|
|
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GFX11-NEXT: v_sub_co_u32 v0, vcc_lo, v0, v2
|
|
; GFX11-NEXT: v_sub_co_ci_u32_e64 v1, null, v1, v3, vcc_lo
|
|
; GFX11-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GFX12-LABEL: v_sub_i64:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
|
|
; GFX12-NEXT: s_wait_expcnt 0x0
|
|
; GFX12-NEXT: s_wait_samplecnt 0x0
|
|
; GFX12-NEXT: s_wait_bvhcnt 0x0
|
|
; GFX12-NEXT: s_wait_kmcnt 0x0
|
|
; GFX12-NEXT: v_sub_co_u32 v0, vcc_lo, v0, v2
|
|
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
|
|
; GFX12-NEXT: v_sub_co_ci_u32_e64 v1, null, v1, v3, vcc_lo
|
|
; GFX12-NEXT: s_setpc_b64 s[30:31]
|
|
%c = sub i64 %a, %b
|
|
ret i64 %c
|
|
}
|
|
|
|
define void @s_usubo_usube(i64 inreg %a, i64 inreg %b, ptr addrspace(1) %res, ptr addrspace(1) %carry) {
|
|
; GFX7-LABEL: s_usubo_usube:
|
|
; GFX7: ; %bb.0:
|
|
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GFX7-NEXT: s_sub_u32 s4, s16, s18
|
|
; GFX7-NEXT: s_subb_u32 s5, s17, s19
|
|
; GFX7-NEXT: v_mov_b32_e32 v4, s4
|
|
; GFX7-NEXT: s_mov_b32 s6, 0
|
|
; GFX7-NEXT: s_cselect_b32 s8, 1, 0
|
|
; GFX7-NEXT: v_mov_b32_e32 v5, s5
|
|
; GFX7-NEXT: s_mov_b32 s7, 0xf000
|
|
; GFX7-NEXT: s_mov_b64 s[4:5], 0
|
|
; GFX7-NEXT: buffer_store_dwordx2 v[4:5], v[0:1], s[4:7], 0 addr64
|
|
; GFX7-NEXT: v_mov_b32_e32 v0, s8
|
|
; GFX7-NEXT: buffer_store_dword v0, v[2:3], s[4:7], 0 addr64
|
|
; GFX7-NEXT: s_waitcnt vmcnt(0)
|
|
; GFX7-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GFX9-LABEL: s_usubo_usube:
|
|
; GFX9: ; %bb.0:
|
|
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GFX9-NEXT: s_sub_u32 s4, s16, s18
|
|
; GFX9-NEXT: s_subb_u32 s5, s17, s19
|
|
; GFX9-NEXT: v_mov_b32_e32 v4, s4
|
|
; GFX9-NEXT: s_cselect_b32 s6, 1, 0
|
|
; GFX9-NEXT: v_mov_b32_e32 v5, s5
|
|
; GFX9-NEXT: global_store_dwordx2 v[0:1], v[4:5], off
|
|
; GFX9-NEXT: v_mov_b32_e32 v0, s6
|
|
; GFX9-NEXT: global_store_dword v[2:3], v0, off
|
|
; GFX9-NEXT: s_waitcnt vmcnt(0)
|
|
; GFX9-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GFX8-LABEL: s_usubo_usube:
|
|
; GFX8: ; %bb.0:
|
|
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GFX8-NEXT: s_sub_u32 s4, s16, s18
|
|
; GFX8-NEXT: s_subb_u32 s5, s17, s19
|
|
; GFX8-NEXT: v_mov_b32_e32 v4, s4
|
|
; GFX8-NEXT: s_cselect_b32 s6, 1, 0
|
|
; GFX8-NEXT: v_mov_b32_e32 v5, s5
|
|
; GFX8-NEXT: flat_store_dwordx2 v[0:1], v[4:5]
|
|
; GFX8-NEXT: v_mov_b32_e32 v0, s6
|
|
; GFX8-NEXT: flat_store_dword v[2:3], v0
|
|
; GFX8-NEXT: s_waitcnt vmcnt(0)
|
|
; GFX8-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GFX10-LABEL: s_usubo_usube:
|
|
; GFX10: ; %bb.0:
|
|
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GFX10-NEXT: s_sub_u32 s4, s16, s18
|
|
; GFX10-NEXT: s_subb_u32 s5, s17, s19
|
|
; GFX10-NEXT: s_cselect_b32 s6, 1, 0
|
|
; GFX10-NEXT: v_mov_b32_e32 v4, s4
|
|
; GFX10-NEXT: v_mov_b32_e32 v5, s5
|
|
; GFX10-NEXT: v_mov_b32_e32 v6, s6
|
|
; GFX10-NEXT: global_store_dwordx2 v[0:1], v[4:5], off
|
|
; GFX10-NEXT: global_store_dword v[2:3], v6, off
|
|
; GFX10-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GFX11-LABEL: s_usubo_usube:
|
|
; GFX11: ; %bb.0:
|
|
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GFX11-NEXT: s_sub_u32 s0, s0, s2
|
|
; GFX11-NEXT: s_subb_u32 s1, s1, s3
|
|
; GFX11-NEXT: s_cselect_b32 s2, 1, 0
|
|
; GFX11-NEXT: v_dual_mov_b32 v5, s1 :: v_dual_mov_b32 v4, s0
|
|
; GFX11-NEXT: v_mov_b32_e32 v6, s2
|
|
; GFX11-NEXT: global_store_b64 v[0:1], v[4:5], off
|
|
; GFX11-NEXT: global_store_b32 v[2:3], v6, off
|
|
; GFX11-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GFX12-LABEL: s_usubo_usube:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
|
|
; GFX12-NEXT: s_wait_expcnt 0x0
|
|
; GFX12-NEXT: s_wait_samplecnt 0x0
|
|
; GFX12-NEXT: s_wait_bvhcnt 0x0
|
|
; GFX12-NEXT: s_wait_kmcnt 0x0
|
|
; GFX12-NEXT: s_sub_co_u32 s0, s0, s2
|
|
; GFX12-NEXT: s_sub_co_ci_u32 s1, s1, s3
|
|
; GFX12-NEXT: s_cselect_b32 s2, 1, 0
|
|
; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)
|
|
; GFX12-NEXT: v_dual_mov_b32 v5, s1 :: v_dual_mov_b32 v4, s0
|
|
; GFX12-NEXT: v_mov_b32_e32 v6, s2
|
|
; GFX12-NEXT: global_store_b64 v[0:1], v[4:5], off
|
|
; GFX12-NEXT: global_store_b32 v[2:3], v6, off
|
|
; GFX12-NEXT: s_setpc_b64 s[30:31]
|
|
%usubo = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
|
|
%sub = extractvalue {i64, i1} %usubo, 0
|
|
%of = extractvalue {i64, i1} %usubo, 1
|
|
%of32 = select i1 %of, i32 1, i32 0
|
|
store i64 %sub, ptr addrspace(1) %res
|
|
store i32 %of32, ptr addrspace(1) %carry
|
|
ret void
|
|
}
|
|
|
|
define void @v_usubo_usube(i64 %a, i64 %b, ptr addrspace(1) %res, ptr addrspace(1) %carry) {
|
|
; GFX7-LABEL: v_usubo_usube:
|
|
; GFX7: ; %bb.0:
|
|
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GFX7-NEXT: v_sub_i32_e32 v0, vcc, v0, v2
|
|
; GFX7-NEXT: v_subb_u32_e32 v1, vcc, v1, v3, vcc
|
|
; GFX7-NEXT: s_mov_b32 s6, 0
|
|
; GFX7-NEXT: s_mov_b32 s7, 0xf000
|
|
; GFX7-NEXT: s_mov_b64 s[4:5], 0
|
|
; GFX7-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
|
|
; GFX7-NEXT: buffer_store_dwordx2 v[0:1], v[4:5], s[4:7], 0 addr64
|
|
; GFX7-NEXT: buffer_store_dword v2, v[6:7], s[4:7], 0 addr64
|
|
; GFX7-NEXT: s_waitcnt vmcnt(0)
|
|
; GFX7-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GFX9-LABEL: v_usubo_usube:
|
|
; GFX9: ; %bb.0:
|
|
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GFX9-NEXT: v_sub_co_u32_e32 v0, vcc, v0, v2
|
|
; GFX9-NEXT: v_subb_co_u32_e32 v1, vcc, v1, v3, vcc
|
|
; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
|
|
; GFX9-NEXT: global_store_dwordx2 v[4:5], v[0:1], off
|
|
; GFX9-NEXT: global_store_dword v[6:7], v2, off
|
|
; GFX9-NEXT: s_waitcnt vmcnt(0)
|
|
; GFX9-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GFX8-LABEL: v_usubo_usube:
|
|
; GFX8: ; %bb.0:
|
|
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GFX8-NEXT: v_sub_u32_e32 v0, vcc, v0, v2
|
|
; GFX8-NEXT: v_subb_u32_e32 v1, vcc, v1, v3, vcc
|
|
; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
|
|
; GFX8-NEXT: flat_store_dwordx2 v[4:5], v[0:1]
|
|
; GFX8-NEXT: flat_store_dword v[6:7], v2
|
|
; GFX8-NEXT: s_waitcnt vmcnt(0)
|
|
; GFX8-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GFX10-LABEL: v_usubo_usube:
|
|
; GFX10: ; %bb.0:
|
|
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GFX10-NEXT: v_sub_co_u32 v0, vcc_lo, v0, v2
|
|
; GFX10-NEXT: v_sub_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo
|
|
; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
|
|
; GFX10-NEXT: global_store_dwordx2 v[4:5], v[0:1], off
|
|
; GFX10-NEXT: global_store_dword v[6:7], v2, off
|
|
; GFX10-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GFX11-LABEL: v_usubo_usube:
|
|
; GFX11: ; %bb.0:
|
|
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
|
; GFX11-NEXT: v_sub_co_u32 v0, vcc_lo, v0, v2
|
|
; GFX11-NEXT: v_sub_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo
|
|
; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
|
|
; GFX11-NEXT: global_store_b64 v[4:5], v[0:1], off
|
|
; GFX11-NEXT: global_store_b32 v[6:7], v2, off
|
|
; GFX11-NEXT: s_setpc_b64 s[30:31]
|
|
;
|
|
; GFX12-LABEL: v_usubo_usube:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
|
|
; GFX12-NEXT: s_wait_expcnt 0x0
|
|
; GFX12-NEXT: s_wait_samplecnt 0x0
|
|
; GFX12-NEXT: s_wait_bvhcnt 0x0
|
|
; GFX12-NEXT: s_wait_kmcnt 0x0
|
|
; GFX12-NEXT: v_sub_co_u32 v0, vcc_lo, v0, v2
|
|
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
|
|
; GFX12-NEXT: v_sub_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo
|
|
; GFX12-NEXT: s_wait_alu depctr_va_vcc(0)
|
|
; GFX12-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
|
|
; GFX12-NEXT: global_store_b64 v[4:5], v[0:1], off
|
|
; GFX12-NEXT: global_store_b32 v[6:7], v2, off
|
|
; GFX12-NEXT: s_setpc_b64 s[30:31]
|
|
%usubo = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
|
|
%sub = extractvalue {i64, i1} %usubo, 0
|
|
%of = extractvalue {i64, i1} %usubo, 1
|
|
%of32 = select i1 %of, i32 1, i32 0
|
|
store i64 %sub, ptr addrspace(1) %res
|
|
store i32 %of32, ptr addrspace(1) %carry
|
|
ret void
|
|
}
|