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62 lines
2.8 KiB
LLVM
62 lines
2.8 KiB
LLVM
; RUN: opt < %s -passes=amdgpu-sw-lower-lds -S -amdgpu-asan-instrument-lds=false -mtriple=amdgcn-amd-amdhsa | FileCheck %s
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; Test that the sw-lower-lds pass moves constant-size allocas from the original
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; entry block to the new entry block (WId), so they remain static allocas.
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@lds = internal addrspace(3) global [64 x i32] poison, align 4
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; Allocas clustered at the top of the entry block (common case).
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define amdgpu_kernel void @kernel_allocas_at_top(i32 %n) sanitize_address {
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; CHECK-LABEL: define amdgpu_kernel void @kernel_allocas_at_top(
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; CHECK-SAME: i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: [[WID:.*]]:
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; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4, addrspace(5)
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; CHECK-NEXT: [[B:%.*]] = alloca i32, align 4, addrspace(5)
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; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.workitem.id.y()
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; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.amdgcn.workitem.id.z()
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; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP0]], [[TMP1]]
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; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP3]], [[TMP2]]
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; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0
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; CHECK-NEXT: br i1 [[TMP5]], label %[[MALLOC:.*]], label %[[BB18:.*]]
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; CHECK: [[BB18]]:
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; CHECK: store i32 [[N]], ptr addrspace(5) [[A]], align 4
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; CHECK-NEXT: store i32 [[N]], ptr addrspace(5) [[B]], align 4
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;
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%a = alloca i32, align 4, addrspace(5)
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%b = alloca i32, align 4, addrspace(5)
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store i32 %n, ptr addrspace(5) %a, align 4
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store i32 %n, ptr addrspace(5) %b, align 4
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store i32 %n, ptr addrspace(3) @lds, align 4
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ret void
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}
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; Allocas interleaved with non-alloca instructions.
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define amdgpu_kernel void @kernel_allocas_scattered(i32 %n) sanitize_address {
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; CHECK-LABEL: define amdgpu_kernel void @kernel_allocas_scattered(
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; CHECK-SAME: i32 [[N:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[WID:.*]]:
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; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4, addrspace(5)
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; CHECK-NEXT: [[B:%.*]] = alloca i32, align 4, addrspace(5)
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; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.workitem.id.y()
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; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.amdgcn.workitem.id.z()
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; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP0]], [[TMP1]]
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; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP3]], [[TMP2]]
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; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0
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; CHECK-NEXT: br i1 [[TMP5]], label %[[MALLOC:.*]], label %[[BB18:.*]]
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; CHECK: [[BB18]]:
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; CHECK: store i32 [[N]], ptr addrspace(5) [[A]], align 4
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; CHECK-NEXT: store i32 [[N]], ptr addrspace(5) [[B]], align 4
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;
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%a = alloca i32, align 4, addrspace(5)
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store i32 %n, ptr addrspace(5) %a, align 4
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%b = alloca i32, align 4, addrspace(5)
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store i32 %n, ptr addrspace(5) %b, align 4
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store i32 %n, ptr addrspace(3) @lds, align 4
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ret void
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}
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!llvm.module.flags = !{!0}
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!0 = !{i32 4, !"nosanitize_address", i32 1}
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