derek.holloway
7502bf64a4
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28 lines
1.6 KiB
LLVM
28 lines
1.6 KiB
LLVM
; RUN: opt -mtriple=amdgcn--amdpal -amdgpu-uniform-intrinsic-combine -mattr=+wavefrontsize64 -S < %s | FileCheck %s -check-prefix=CHECK
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; If uniformity analysis sees that the workgroup size is 1, it would say this function is trivially uniform.
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; However, the function's use of wwm means that all lanes will be active even if the workgroup size is 1, so
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; it should not be considered uniform, and we should not see the permlane64 optimized out.
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define amdgpu_kernel void @kernel(ptr addrspace(4) %input, ptr addrspace(1) %out) #0 {
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; CHECK-LABEL: define amdgpu_kernel void @kernel(
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; CHECK: call float @llvm.amdgcn.permlane64.f32
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.entry:
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%element_ptr = getelementptr i8, ptr addrspace(4) %input, i64 16
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%buffer = load <4 x i32>, ptr addrspace(4) %element_ptr, align 16
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%lane_id_lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0)
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%lane_id = call i32 @llvm.amdgcn.mbcnt.hi(i32 -1, i32 %lane_id_lo)
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%lane_id_idx = shl i32 %lane_id, 2
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%vals = call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> %buffer, i32 %lane_id_idx, i32 0)
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%vals_inactive_zeroed = call i32 @llvm.amdgcn.set.inactive.i32(i32 %vals, i32 0)
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%float_vals = bitcast i32 %vals_inactive_zeroed to float
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%swapped_vals = call float @llvm.amdgcn.permlane64.f32(float %float_vals)
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%sum = fadd float %swapped_vals, %float_vals
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%res = call float @llvm.amdgcn.readfirstlane.f32(float %sum)
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%res_i32 = bitcast float %res to i32
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%res_i32_wwm = call i32 @llvm.amdgcn.strict.wwm.i32(i32 %res_i32)
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store i32 %res_i32_wwm, ptr addrspace(1) %out
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ret void
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}
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attributes #0 = { alwaysinline nounwind memory(readwrite) "amdgpu-flat-work-group-size"="1,1" }
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