derek.holloway
7502bf64a4
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105 lines
3.0 KiB
LLVM
105 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -S -passes=amdgpu-unify-divergent-exit-nodes -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a %s -o - | FileCheck %s
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declare void @foo(ptr)
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declare i1 @bar(ptr)
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declare i32 @bar32(ptr)
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define void @musttail_call_without_return_value(ptr %p) {
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; CHECK-LABEL: define void @musttail_call_without_return_value(
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; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[LOAD:%.*]] = load i1, ptr [[P]], align 1
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; CHECK-NEXT: br i1 [[LOAD]], label %[[BB_0:.*]], label %[[BB_1:.*]]
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; CHECK: [[BB_0]]:
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; CHECK-NEXT: musttail call void @foo(ptr [[P]])
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; CHECK-NEXT: ret void
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; CHECK: [[BB_1]]:
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; CHECK-NEXT: ret void
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;
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entry:
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%load = load i1, ptr %p, align 1
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br i1 %load, label %bb.0, label %bb.1
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bb.0:
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musttail call void @foo(ptr %p)
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ret void
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bb.1:
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ret void
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}
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define void @musttail_call_without_return_value_callbr(ptr %p) {
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; CHECK-LABEL: define void @musttail_call_without_return_value_callbr(
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; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[P]], align 1
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; CHECK-NEXT: callbr void asm "", "r,!i"(i32 [[LOAD]])
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; CHECK-NEXT: to label %[[BB_0:.*]] [label %bb.1]
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; CHECK: [[BB_0]]:
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; CHECK-NEXT: musttail call void @foo(ptr [[P]])
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; CHECK-NEXT: ret void
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; CHECK: [[BB_1:.*:]]
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; CHECK-NEXT: ret void
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;
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entry:
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%load = load i32, ptr %p, align 1
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callbr void asm "", "r,!i"(i32 %load) to label %bb.0 [label %bb.1]
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bb.0:
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musttail call void @foo(ptr %p)
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ret void
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bb.1:
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ret void
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}
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define i1 @musttail_call_with_return_value(ptr %p) {
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; CHECK-LABEL: define i1 @musttail_call_with_return_value(
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; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[LOAD:%.*]] = load i1, ptr [[P]], align 1
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; CHECK-NEXT: br i1 [[LOAD]], label %[[BB_0:.*]], label %[[BB_1:.*]]
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; CHECK: [[BB_0]]:
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; CHECK-NEXT: [[RET:%.*]] = musttail call i1 @bar(ptr [[P]])
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; CHECK-NEXT: ret i1 [[RET]]
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; CHECK: [[BB_1]]:
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; CHECK-NEXT: ret i1 [[LOAD]]
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;
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entry:
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%load = load i1, ptr %p, align 1
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br i1 %load, label %bb.0, label %bb.1
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bb.0:
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%ret = musttail call i1 @bar(ptr %p)
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ret i1 %ret
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bb.1:
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ret i1 %load
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}
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define i32 @musttail_call_with_return_value_callbr(ptr %p) {
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; CHECK-LABEL: define i32 @musttail_call_with_return_value_callbr(
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; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[P]], align 1
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; CHECK-NEXT: callbr void asm "", "r,!i"(i32 [[LOAD]])
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; CHECK-NEXT: to label %[[BB_0:.*]] [label %bb.1]
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; CHECK: [[BB_0]]:
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; CHECK-NEXT: [[RET:%.*]] = musttail call i32 @bar32(ptr [[P]])
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; CHECK-NEXT: ret i32 [[RET]]
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; CHECK: [[BB_1:.*:]]
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; CHECK-NEXT: ret i32 [[LOAD]]
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;
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entry:
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%load = load i32, ptr %p, align 1
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callbr void asm "", "r,!i"(i32 %load) to label %bb.0 [label %bb.1]
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bb.0:
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%ret = musttail call i32 @bar32(ptr %p)
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ret i32 %ret
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bb.1:
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ret i32 %load
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}
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