derek.holloway
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125 lines
5.9 KiB
YAML
125 lines
5.9 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
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# RUN: llc -mtriple=amdgcn -verify-machineinstrs -mcpu=gfx1030 -run-pass prologepilog -o - %s | FileCheck %s
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# s_cselect_b32 does not allow vreg & should use the sreg frameindex generated
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# by v_readfirstlane_b32 in eliminateFrameIndex.
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---
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name: test_s_cselect_b32
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tracksRegLiveness: true
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stack:
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- { id: 0, size: 12}
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machineFunctionInfo:
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scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
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frameOffsetReg: '$sgpr33'
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stackPtrOffsetReg: '$sgpr32'
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body: |
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; CHECK-LABEL: name: test_s_cselect_b32
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.1(0x80000000)
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; CHECK-NEXT: liveins: $vgpr41
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
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; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr41, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: ("amdgpu-thread-private" store (s32) into %stack.1, addrspace 5)
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_vector_offset $vgpr41, 32, $exec_lo, 32, 0
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; CHECK-NEXT: renamable $vgpr41 = V_MOV_B32_e32 0, implicit $exec
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; CHECK-NEXT: renamable $sgpr4 = S_MOV_B32 0
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; CHECK-NEXT: renamable $sgpr5 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
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; CHECK-NEXT: renamable $sgpr54 = S_ADD_I32 $sgpr5, 8, implicit-def dead $scc
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: successors: %bb.2(0x80000000)
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; CHECK-NEXT: liveins: $sgpr4, $sgpr54:0x000000000000000F
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: S_CMP_EQ_U32 killed renamable $sgpr4, 0, implicit-def $scc
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; CHECK-NEXT: $vgpr0 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
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; CHECK-NEXT: $vgpr0 = V_ADD_U32_e32 4, killed $vgpr0, implicit $exec
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; CHECK-NEXT: $sgpr5 = V_READFIRSTLANE_B32 $vgpr0, implicit $exec
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; CHECK-NEXT: renamable $sgpr4 = S_CSELECT_B32 0, killed $sgpr5, implicit $scc
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; CHECK-NEXT: $vgpr0 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
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; CHECK-NEXT: $vgpr0 = V_ADD_U32_e32 4, killed $vgpr0, implicit $exec
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; CHECK-NEXT: $sgpr4 = V_READFIRSTLANE_B32 $vgpr0, implicit $exec
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; CHECK-NEXT: renamable $sgpr6 = S_CSELECT_B32 killed $sgpr4, 0, implicit $scc
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; CHECK-NEXT: renamable $sgpr5 = S_CSELECT_B32 4, renamable $sgpr54, implicit $scc
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; CHECK-NEXT: S_BRANCH %bb.2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.2:
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; CHECK-NEXT: $vgpr41 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: ("amdgpu-thread-private" load (s32) from %stack.1, addrspace 5)
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; CHECK-NEXT: SI_RETURN
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bb.0:
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renamable $vgpr41 = V_MOV_B32_e32 0, implicit $exec
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renamable $sgpr4 = S_MOV_B32 0
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renamable $sgpr54 = S_ADD_I32 %stack.0, 4, implicit-def dead $scc
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bb.1:
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liveins: $sgpr4, $sgpr54:0x000000000000000F
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S_CMP_EQ_U32 killed renamable $sgpr4, 0, implicit-def $scc
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renamable $sgpr4 = S_CSELECT_B32 0, %stack.0, implicit $scc
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renamable $sgpr6 = S_CSELECT_B32 %stack.0, 0, implicit $scc
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renamable $sgpr5 = S_CSELECT_B32 4, renamable $sgpr54, implicit $scc
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S_BRANCH %bb.2
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bb.2:
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SI_RETURN
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...
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# ensure register constraints of V_CNDMASK_B32_e32 are respected by
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# eliminateFrameIndex.
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---
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name: test_v_cndmask_e32
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tracksRegLiveness: true
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stack:
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- { id: 0, size: 12}
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machineFunctionInfo:
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scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
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frameOffsetReg: '$sgpr33'
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stackPtrOffsetReg: '$sgpr32'
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body: |
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bb.0:
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liveins: $sgpr4
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; CHECK-LABEL: name: test_v_cndmask_e32
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; CHECK: liveins: $sgpr4
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
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; CHECK-NEXT: $vcc_lo = V_CMP_EQ_U32_e64 killed $sgpr4, 0, implicit $exec
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; CHECK-NEXT: renamable $vgpr2 = V_MOV_B32_e32 0, implicit $exec
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; CHECK-NEXT: $vgpr1 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
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; CHECK-NEXT: renamable $vgpr0 = V_CNDMASK_B32_e32 killed $vgpr1, killed $vgpr2, implicit $vcc_lo, implicit $vcc_lo, implicit $exec
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; CHECK-NEXT: SI_RETURN
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V_CMP_EQ_U32_e64 def $vcc_lo, killed $sgpr4, 0, implicit $exec
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renamable $vgpr2 = V_MOV_B32_e32 0, implicit $exec
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renamable $vgpr0 = V_CNDMASK_B32_e32 %stack.0, killed $vgpr2, implicit $vcc_lo, implicit $vcc, implicit $exec
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SI_RETURN
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...
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# ensure register constraints of V_CNDMASK_B32_e64 are respected by
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# eliminateFrameIndex.
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---
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name: test_v_cndmask_e64
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tracksRegLiveness: true
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stack:
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- { id: 0, size: 12}
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machineFunctionInfo:
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scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
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frameOffsetReg: '$sgpr33'
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stackPtrOffsetReg: '$sgpr32'
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body: |
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bb.0:
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liveins: $sgpr4
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; CHECK-LABEL: name: test_v_cndmask_e64
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; CHECK: liveins: $sgpr4
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
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; CHECK-NEXT: renamable $vgpr2 = V_MOV_B32_e32 0, implicit $exec
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; CHECK-NEXT: $vgpr1 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
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; CHECK-NEXT: renamable $vgpr0 = V_CNDMASK_B32_e64 0, killed $vgpr1, 0, killed $vgpr2, $sgpr4, implicit $exec
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; CHECK-NEXT: SI_RETURN
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renamable $vgpr2 = V_MOV_B32_e32 0, implicit $exec
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renamable $vgpr0 = V_CNDMASK_B32_e64 0, %stack.0, 0, killed $vgpr2, $sgpr4, implicit $exec
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SI_RETURN
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...
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