derek.holloway
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91 lines
3.3 KiB
LLVM
91 lines
3.3 KiB
LLVM
; RUN: llc -mtriple=amdgcn < %s | FileCheck -check-prefix=SI %s
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; RUN: llc -mtriple=amdgcn -mcpu=bonaire < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
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declare i32 @llvm.amdgcn.workitem.id.x() #1
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declare double @llvm.fabs.f64(double) #1
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; SI-LABEL: {{^}}fp_to_uint_i32_f64:
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; SI: v_cvt_u32_f64_e32
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define amdgpu_kernel void @fp_to_uint_i32_f64(ptr addrspace(1) %out, double %in) {
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%cast = fptoui double %in to i32
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store i32 %cast, ptr addrspace(1) %out, align 4
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ret void
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}
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; SI-LABEL: @fp_to_uint_v2i32_v2f64
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; SI: v_cvt_u32_f64_e32
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; SI: v_cvt_u32_f64_e32
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define amdgpu_kernel void @fp_to_uint_v2i32_v2f64(ptr addrspace(1) %out, <2 x double> %in) {
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%cast = fptoui <2 x double> %in to <2 x i32>
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store <2 x i32> %cast, ptr addrspace(1) %out, align 8
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ret void
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}
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; SI-LABEL: @fp_to_uint_v4i32_v4f64
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; SI: v_cvt_u32_f64_e32
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; SI: v_cvt_u32_f64_e32
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; SI: v_cvt_u32_f64_e32
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; SI: v_cvt_u32_f64_e32
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define amdgpu_kernel void @fp_to_uint_v4i32_v4f64(ptr addrspace(1) %out, <4 x double> %in) {
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%cast = fptoui <4 x double> %in to <4 x i32>
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store <4 x i32> %cast, ptr addrspace(1) %out, align 8
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ret void
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}
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; FUNC-LABEL: @fp_to_uint_i64_f64
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; CI-DAG: buffer_load_dwordx2 [[VAL:v\[[0-9]+:[0-9]+\]]]
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; CI-DAG: v_trunc_f64_e32 [[TRUNC:v\[[0-9]+:[0-9]+\]]], [[VAL]]
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; CI-DAG: s_movk_i32 [[K0_EXP:s[0-9]+]], 0xffe0
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; CI-DAG: v_ldexp_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], [[VAL]], [[K0_EXP]]
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; CI-DAG: v_floor_f64_e32 [[FLOOR:v\[[0-9]+:[0-9]+\]]], [[MUL]]
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; CI-DAG: s_mov_b32 s[[K1_HI:[0-9]+]], 0xc1f00000
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; CI-DAG: v_fma_f64 [[FMA:v\[[0-9]+:[0-9]+\]]], [[FLOOR]], s{{\[[0-9]+}}:[[K1_HI]]], [[TRUNC]]
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; CI-DAG: v_cvt_u32_f64_e32 v[[LO:[0-9]+]], [[FMA]]
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; CI-DAG: v_cvt_u32_f64_e32 v[[HI:[0-9]+]], [[FLOOR]]
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; CI: buffer_store_dwordx2 v[[[LO]]:[[HI]]]
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define amdgpu_kernel void @fp_to_uint_i64_f64(ptr addrspace(1) %out, ptr addrspace(1) %in) {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep = getelementptr double, ptr addrspace(1) %in, i32 %tid
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%val = load double, ptr addrspace(1) %gep, align 8
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%cast = fptoui double %val to i64
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store i64 %cast, ptr addrspace(1) %out, align 4
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ret void
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}
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; SI-LABEL: @fp_to_uint_v2i64_v2f64
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define amdgpu_kernel void @fp_to_uint_v2i64_v2f64(ptr addrspace(1) %out, <2 x double> %in) {
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%cast = fptoui <2 x double> %in to <2 x i64>
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store <2 x i64> %cast, ptr addrspace(1) %out, align 16
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ret void
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}
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; SI-LABEL: @fp_to_uint_v4i64_v4f64
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define amdgpu_kernel void @fp_to_uint_v4i64_v4f64(ptr addrspace(1) %out, <4 x double> %in) {
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%cast = fptoui <4 x double> %in to <4 x i64>
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store <4 x i64> %cast, ptr addrspace(1) %out, align 32
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ret void
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}
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; FUNC-LABEL: {{^}}fp_to_uint_f64_to_i1:
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; SI: v_cmp_eq_f64_e64 s{{\[[0-9]+:[0-9]+\]}}, 1.0, s{{\[[0-9]+:[0-9]+\]}}
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define amdgpu_kernel void @fp_to_uint_f64_to_i1(ptr addrspace(1) %out, double %in) #0 {
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%conv = fptoui double %in to i1
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store i1 %conv, ptr addrspace(1) %out
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ret void
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}
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; FUNC-LABEL: {{^}}fp_to_uint_fabs_f64_to_i1:
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; SI: v_cmp_eq_f64_e64 s{{\[[0-9]+:[0-9]+\]}}, 1.0, |s{{\[[0-9]+:[0-9]+\]}}|
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define amdgpu_kernel void @fp_to_uint_fabs_f64_to_i1(ptr addrspace(1) %out, double %in) #0 {
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%in.fabs = call double @llvm.fabs.f64(double %in)
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%conv = fptoui double %in.fabs to i1
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store i1 %conv, ptr addrspace(1) %out
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ret void
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}
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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