derek.holloway
7502bf64a4
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184 lines
5.8 KiB
YAML
184 lines
5.8 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
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# RUN: llc -mtriple=amdgcn -mcpu=gfx1250 -run-pass si-fold-operands %s -o - | FileCheck -check-prefix=GCN %s
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---
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name: s_ashr_i64
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: s_ashr_i64
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; GCN: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
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; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $src_flat_scratch_base_hi
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; GCN-NEXT: [[S_ASHR_I64_:%[0-9]+]]:sreg_64 = S_ASHR_I64 [[DEF]], [[COPY]], implicit-def $scc
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%1:sreg_64 = IMPLICIT_DEF
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%0:sreg_32 = COPY $src_flat_scratch_base_hi
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%2:sreg_64 = S_ASHR_I64 %1:sreg_64, %0, implicit-def $scc
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...
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---
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name: s_lshl_b64
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: s_lshl_b64
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; GCN: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
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; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $src_flat_scratch_base_hi
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; GCN-NEXT: [[S_LSHL_B64_:%[0-9]+]]:sreg_64 = S_LSHL_B64 [[DEF]], [[COPY]], implicit-def $scc
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%1:sreg_64 = IMPLICIT_DEF
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%0:sreg_32 = COPY $src_flat_scratch_base_hi
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%2:sreg_64 = S_LSHL_B64 %1:sreg_64, %0, implicit-def $scc
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...
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---
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name: s_lshr_b64
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: s_lshr_b64
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; GCN: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
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; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $src_flat_scratch_base_hi
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; GCN-NEXT: [[S_LSHR_B64_:%[0-9]+]]:sreg_64 = S_LSHR_B64 [[DEF]], [[COPY]], implicit-def $scc
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%1:sreg_64 = IMPLICIT_DEF
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%0:sreg_32 = COPY $src_flat_scratch_base_hi
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%2:sreg_64 = S_LSHR_B64 %1:sreg_64, %0, implicit-def $scc
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...
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---
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name: s_bfe_i64
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: s_bfe_i64
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; GCN: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
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; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $src_flat_scratch_base_hi
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; GCN-NEXT: [[S_BFE_I64_:%[0-9]+]]:sreg_64 = S_BFE_I64 [[DEF]], [[COPY]], implicit-def $scc
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%1:sreg_64 = IMPLICIT_DEF
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%0:sreg_32 = COPY $src_flat_scratch_base_hi
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%2:sreg_64 = S_BFE_I64 %1:sreg_64, %0, implicit-def $scc
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...
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---
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name: s_bfe_u64
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: s_bfe_u64
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; GCN: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
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; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $src_flat_scratch_base_hi
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; GCN-NEXT: [[S_BFE_U64_:%[0-9]+]]:sreg_64 = S_BFE_U64 [[DEF]], [[COPY]], implicit-def $scc
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%1:sreg_64 = IMPLICIT_DEF
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%0:sreg_32 = COPY $src_flat_scratch_base_hi
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%2:sreg_64 = S_BFE_U64 %1:sreg_64, %0, implicit-def $scc
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...
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---
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name: s_bfm_b64
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: s_bfm_b64
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; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $src_flat_scratch_base_hi
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; GCN-NEXT: [[S_BFM_B64_:%[0-9]+]]:sreg_64 = S_BFM_B64 [[COPY]], 1, implicit-def $scc
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%0:sreg_32 = COPY $src_flat_scratch_base_hi
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%1:sreg_64 = S_BFM_B64 %0, 1, implicit-def $scc
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...
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---
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name: s_bitcmp0_b64
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: s_bitcmp0_b64
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; GCN: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
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; GCN-NEXT: $scc = IMPLICIT_DEF
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; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $src_flat_scratch_base_hi
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; GCN-NEXT: S_BITCMP0_B64 [[DEF]], [[COPY]], implicit $scc, implicit-def $scc
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%1:sreg_64 = IMPLICIT_DEF
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$scc = IMPLICIT_DEF
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%0:sreg_32 = COPY $src_flat_scratch_base_hi
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S_BITCMP0_B64 %1:sreg_64, %0, implicit $scc, implicit-def $scc
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...
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---
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name: s_bitcmp1_b64
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: s_bitcmp1_b64
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; GCN: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
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; GCN-NEXT: $scc = IMPLICIT_DEF
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; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $src_flat_scratch_base_hi
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; GCN-NEXT: S_BITCMP1_B64 [[DEF]], [[COPY]], implicit $scc, implicit-def $scc
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%1:sreg_64 = IMPLICIT_DEF
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$scc = IMPLICIT_DEF
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%0:sreg_32 = COPY $src_flat_scratch_base_hi
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S_BITCMP1_B64 %1:sreg_64, %0, implicit $scc, implicit-def $scc
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...
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---
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name: s_bitreplicate_b64_b32
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: s_bitreplicate_b64_b32
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; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $src_flat_scratch_base_hi
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; GCN-NEXT: [[S_BITREPLICATE_B64_B32_:%[0-9]+]]:sreg_64 = S_BITREPLICATE_B64_B32 [[COPY]], implicit-def $scc
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%0:sreg_32 = COPY $src_flat_scratch_base_hi
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%2:sreg_64 = S_BITREPLICATE_B64_B32 %0, implicit-def $scc
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...
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---
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name: s_bitset0_b64
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: s_bitset0_b64
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; GCN: $sgpr0_sgpr1 = IMPLICIT_DEF
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; GCN-NEXT: $sgpr2 = S_MOV_B32 $src_flat_scratch_base_hi
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; GCN-NEXT: $sgpr0_sgpr1 = S_BITSET0_B64 $sgpr2, $sgpr0_sgpr1, implicit-def $scc
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$sgpr0_sgpr1 = IMPLICIT_DEF
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$sgpr2 = S_MOV_B32 $src_flat_scratch_base_hi
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$sgpr0_sgpr1 = S_BITSET0_B64 $sgpr2, $sgpr0_sgpr1, implicit-def $scc
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...
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---
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name: s_bitset1_b64
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: s_bitset1_b64
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; GCN: $sgpr0_sgpr1 = IMPLICIT_DEF
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; GCN-NEXT: $sgpr2 = S_MOV_B32 $src_flat_scratch_base_hi
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; GCN-NEXT: $sgpr0_sgpr1 = S_BITSET1_B64 $sgpr2, $sgpr0_sgpr1, implicit-def $scc
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$sgpr0_sgpr1 = IMPLICIT_DEF
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$sgpr2 = S_MOV_B32 $src_flat_scratch_base_hi
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$sgpr0_sgpr1 = S_BITSET1_B64 $sgpr2, $sgpr0_sgpr1, implicit-def $scc
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...
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---
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name: s_ashr_i64_phys_dst
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: s_ashr_i64_phys_dst
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; GCN: $sgpr0_sgpr1 = IMPLICIT_DEF
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; GCN-NEXT: $sgpr2 = COPY $src_flat_scratch_base_hi
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; GCN-NEXT: $sgpr0_sgpr1 = S_ASHR_I64 $sgpr0_sgpr1, $sgpr2, implicit-def $scc
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$sgpr0_sgpr1 = IMPLICIT_DEF
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$sgpr2 = COPY $src_flat_scratch_base_hi
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%0:sreg_32 = COPY $src_flat_scratch_base_hi
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$sgpr0_sgpr1 = S_ASHR_I64 $sgpr0_sgpr1, $sgpr2, implicit-def $scc
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...
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