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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

1560 lines
73 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx906 < %s | FileCheck -check-prefix=GFX906-SDAG %s
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx942 < %s | FileCheck -check-prefix=GFX942-SDAG %s
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1012 < %s | FileCheck -check-prefix=GFX1012-SDAG %s
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck -check-prefix=GFX1100-SDAG %s
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -check-prefix=GFX1250-SDAG %s
; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx906 < %s | FileCheck -check-prefix=GFX906-ISEL %s
; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx942 < %s | FileCheck -check-prefix=GFX942-ISEL %s
; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1012 < %s | FileCheck -check-prefix=GFX1012-ISEL %s
; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck -check-prefix=GFX1100-ISEL %s
; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -check-prefix=GFX1250-ISEL %s
;;==============================================================================
;; A few basic test cases
;;==============================================================================
;; vgpr pointer, wavefront scope
define void @av_global_store_b128_0_00(ptr addrspace(1) %addr, <4 x i32> %data) {
; GFX906-SDAG-LABEL: av_global_store_b128_0_00:
; GFX906-SDAG: ; %bb.0: ; %entry
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX906-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-SDAG-LABEL: av_global_store_b128_0_00:
; GFX942-SDAG: ; %bb.0: ; %entry
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX942-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-SDAG-LABEL: av_global_store_b128_0_00:
; GFX1012-SDAG: ; %bb.0: ; %entry
; GFX1012-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
; GFX1012-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-SDAG-LABEL: av_global_store_b128_0_00:
; GFX1100-SDAG: ; %bb.0: ; %entry
; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-SDAG-LABEL: av_global_store_b128_0_00:
; GFX1250-SDAG: ; %bb.0: ; %entry
; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX1250-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX906-ISEL-LABEL: av_global_store_b128_0_00:
; GFX906-ISEL: ; %bb.0: ; %entry
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-ISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX906-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-ISEL-LABEL: av_global_store_b128_0_00:
; GFX942-ISEL: ; %bb.0: ; %entry
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-ISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX942-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-ISEL-LABEL: av_global_store_b128_0_00:
; GFX1012-ISEL: ; %bb.0: ; %entry
; GFX1012-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-ISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
; GFX1012-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-ISEL-LABEL: av_global_store_b128_0_00:
; GFX1100-ISEL: ; %bb.0: ; %entry
; GFX1100-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-ISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
; GFX1100-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-ISEL-LABEL: av_global_store_b128_0_00:
; GFX1250-ISEL: ; %bb.0: ; %entry
; GFX1250-ISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-ISEL-NEXT: s_wait_kmcnt 0x0
; GFX1250-ISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
; GFX1250-ISEL-NEXT: s_set_pc_i64 s[30:31]
entry:
call void @llvm.amdgcn.av.store.b128.p1(ptr addrspace(1) %addr, <4 x i32> %data, metadata !0)
ret void
}
;; vgpr pointer, workgroup scope
define void @av_global_store_b128_0_01(ptr addrspace(1) %addr, <4 x i32> %data) {
; GFX906-SDAG-LABEL: av_global_store_b128_0_01:
; GFX906-SDAG: ; %bb.0: ; %entry
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX906-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-SDAG-LABEL: av_global_store_b128_0_01:
; GFX942-SDAG: ; %bb.0: ; %entry
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off sc0
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX942-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-SDAG-LABEL: av_global_store_b128_0_01:
; GFX1012-SDAG: ; %bb.0: ; %entry
; GFX1012-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
; GFX1012-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-SDAG-LABEL: av_global_store_b128_0_01:
; GFX1100-SDAG: ; %bb.0: ; %entry
; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-SDAG-LABEL: av_global_store_b128_0_01:
; GFX1250-SDAG: ; %bb.0: ; %entry
; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX1250-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX906-ISEL-LABEL: av_global_store_b128_0_01:
; GFX906-ISEL: ; %bb.0: ; %entry
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-ISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX906-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-ISEL-LABEL: av_global_store_b128_0_01:
; GFX942-ISEL: ; %bb.0: ; %entry
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-ISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off sc0
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX942-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-ISEL-LABEL: av_global_store_b128_0_01:
; GFX1012-ISEL: ; %bb.0: ; %entry
; GFX1012-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-ISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
; GFX1012-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-ISEL-LABEL: av_global_store_b128_0_01:
; GFX1100-ISEL: ; %bb.0: ; %entry
; GFX1100-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-ISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
; GFX1100-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-ISEL-LABEL: av_global_store_b128_0_01:
; GFX1250-ISEL: ; %bb.0: ; %entry
; GFX1250-ISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-ISEL-NEXT: s_wait_kmcnt 0x0
; GFX1250-ISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
; GFX1250-ISEL-NEXT: s_set_pc_i64 s[30:31]
entry:
call void @llvm.amdgcn.av.store.b128.p1(ptr addrspace(1) %addr, <4 x i32> %data, metadata !1)
ret void
}
;; vgpr pointer, agent scope
define void @av_global_store_b128_0_10(ptr addrspace(1) %addr, <4 x i32> %data) {
; GFX906-SDAG-LABEL: av_global_store_b128_0_10:
; GFX906-SDAG: ; %bb.0: ; %entry
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX906-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-SDAG-LABEL: av_global_store_b128_0_10:
; GFX942-SDAG: ; %bb.0: ; %entry
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off sc1
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX942-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-SDAG-LABEL: av_global_store_b128_0_10:
; GFX1012-SDAG: ; %bb.0: ; %entry
; GFX1012-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
; GFX1012-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-SDAG-LABEL: av_global_store_b128_0_10:
; GFX1100-SDAG: ; %bb.0: ; %entry
; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-SDAG-LABEL: av_global_store_b128_0_10:
; GFX1250-SDAG: ; %bb.0: ; %entry
; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX1250-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off scope:SCOPE_DEV
; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX906-ISEL-LABEL: av_global_store_b128_0_10:
; GFX906-ISEL: ; %bb.0: ; %entry
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-ISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX906-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-ISEL-LABEL: av_global_store_b128_0_10:
; GFX942-ISEL: ; %bb.0: ; %entry
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-ISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off sc1
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX942-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-ISEL-LABEL: av_global_store_b128_0_10:
; GFX1012-ISEL: ; %bb.0: ; %entry
; GFX1012-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-ISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
; GFX1012-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-ISEL-LABEL: av_global_store_b128_0_10:
; GFX1100-ISEL: ; %bb.0: ; %entry
; GFX1100-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-ISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
; GFX1100-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-ISEL-LABEL: av_global_store_b128_0_10:
; GFX1250-ISEL: ; %bb.0: ; %entry
; GFX1250-ISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-ISEL-NEXT: s_wait_kmcnt 0x0
; GFX1250-ISEL-NEXT: global_store_b128 v[0:1], v[2:5], off scope:SCOPE_DEV
; GFX1250-ISEL-NEXT: s_set_pc_i64 s[30:31]
entry:
call void @llvm.amdgcn.av.store.b128.p1(ptr addrspace(1) %addr, <4 x i32> %data, metadata !2)
ret void
}
;; vgpr pointer, system scope
define void @av_global_store_b128_0_11(ptr addrspace(1) %addr, <4 x i32> %data) {
; GFX906-SDAG-LABEL: av_global_store_b128_0_11:
; GFX906-SDAG: ; %bb.0: ; %entry
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX906-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-SDAG-LABEL: av_global_store_b128_0_11:
; GFX942-SDAG: ; %bb.0: ; %entry
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off sc0 sc1
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX942-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-SDAG-LABEL: av_global_store_b128_0_11:
; GFX1012-SDAG: ; %bb.0: ; %entry
; GFX1012-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-SDAG-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
; GFX1012-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-SDAG-LABEL: av_global_store_b128_0_11:
; GFX1100-SDAG: ; %bb.0: ; %entry
; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off
; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-SDAG-LABEL: av_global_store_b128_0_11:
; GFX1250-SDAG: ; %bb.0: ; %entry
; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX1250-SDAG-NEXT: global_store_b128 v[0:1], v[2:5], off scope:SCOPE_SYS
; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX906-ISEL-LABEL: av_global_store_b128_0_11:
; GFX906-ISEL: ; %bb.0: ; %entry
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-ISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX906-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-ISEL-LABEL: av_global_store_b128_0_11:
; GFX942-ISEL: ; %bb.0: ; %entry
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-ISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off sc0 sc1
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX942-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-ISEL-LABEL: av_global_store_b128_0_11:
; GFX1012-ISEL: ; %bb.0: ; %entry
; GFX1012-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-ISEL-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
; GFX1012-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-ISEL-LABEL: av_global_store_b128_0_11:
; GFX1100-ISEL: ; %bb.0: ; %entry
; GFX1100-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-ISEL-NEXT: global_store_b128 v[0:1], v[2:5], off
; GFX1100-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-ISEL-LABEL: av_global_store_b128_0_11:
; GFX1250-ISEL: ; %bb.0: ; %entry
; GFX1250-ISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-ISEL-NEXT: s_wait_kmcnt 0x0
; GFX1250-ISEL-NEXT: global_store_b128 v[0:1], v[2:5], off scope:SCOPE_SYS
; GFX1250-ISEL-NEXT: s_set_pc_i64 s[30:31]
entry:
call void @llvm.amdgcn.av.store.b128.p1(ptr addrspace(1) %addr, <4 x i32> %data, metadata !3)
ret void
}
;;==============================================================================
;; Signed offset addressing modes (derived from global-saddr-store.ll)
;;==============================================================================
;; basic pattern, no immediate offset
define void @global_store_i8_zext_vgpr(ptr addrspace(1) %sbase, ptr addrspace(1) %voffset.ptr, <4 x i32> %data) {
; GFX906-SDAG-LABEL: global_store_i8_zext_vgpr:
; GFX906-SDAG: ; %bb.0:
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-SDAG-NEXT: global_load_dword v2, v[2:3], off
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX906-SDAG-NEXT: v_add_co_u32_e32 v0, vcc, v0, v2
; GFX906-SDAG-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX906-SDAG-NEXT: global_store_dwordx4 v[0:1], v[4:7], off
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX906-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-SDAG-LABEL: global_store_i8_zext_vgpr:
; GFX942-SDAG: ; %bb.0:
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-SDAG-NEXT: global_load_dword v2, v[2:3], off
; GFX942-SDAG-NEXT: v_mov_b32_e32 v3, 0
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX942-SDAG-NEXT: v_lshl_add_u64 v[0:1], v[0:1], 0, v[2:3]
; GFX942-SDAG-NEXT: global_store_dwordx4 v[0:1], v[4:7], off
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX942-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-SDAG-LABEL: global_store_i8_zext_vgpr:
; GFX1012-SDAG: ; %bb.0:
; GFX1012-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-SDAG-NEXT: global_load_dword v2, v[2:3], off
; GFX1012-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX1012-SDAG-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2
; GFX1012-SDAG-NEXT: v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
; GFX1012-SDAG-NEXT: global_store_dwordx4 v[0:1], v[4:7], off
; GFX1012-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-SDAG-LABEL: global_store_i8_zext_vgpr:
; GFX1100-SDAG: ; %bb.0:
; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-SDAG-NEXT: global_load_b32 v2, v[2:3], off
; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX1100-SDAG-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2
; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-SDAG-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX1100-SDAG-NEXT: global_store_b128 v[0:1], v[4:7], off
; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-SDAG-LABEL: global_store_i8_zext_vgpr:
; GFX1250-SDAG: ; %bb.0:
; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX1250-SDAG-NEXT: global_load_b32 v2, v[2:3], off
; GFX1250-SDAG-NEXT: s_wait_xcnt 0x0
; GFX1250-SDAG-NEXT: v_mov_b32_e32 v3, 0
; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1250-SDAG-NEXT: v_add_nc_u64_e32 v[0:1], v[0:1], v[2:3]
; GFX1250-SDAG-NEXT: global_store_b128 v[0:1], v[4:7], off
; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX906-ISEL-LABEL: global_store_i8_zext_vgpr:
; GFX906-ISEL: ; %bb.0:
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-ISEL-NEXT: global_load_dword v2, v[2:3], off
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX906-ISEL-NEXT: v_add_co_u32_e32 v0, vcc, v0, v2
; GFX906-ISEL-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX906-ISEL-NEXT: global_store_dwordx4 v[0:1], v[4:7], off
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX906-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-ISEL-LABEL: global_store_i8_zext_vgpr:
; GFX942-ISEL: ; %bb.0:
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-ISEL-NEXT: global_load_dword v2, v[2:3], off
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX942-ISEL-NEXT: v_add_co_u32_e32 v0, vcc, v0, v2
; GFX942-ISEL-NEXT: s_nop 1
; GFX942-ISEL-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX942-ISEL-NEXT: global_store_dwordx4 v[0:1], v[4:7], off
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX942-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-ISEL-LABEL: global_store_i8_zext_vgpr:
; GFX1012-ISEL: ; %bb.0:
; GFX1012-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-ISEL-NEXT: global_load_dword v2, v[2:3], off
; GFX1012-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX1012-ISEL-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2
; GFX1012-ISEL-NEXT: v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
; GFX1012-ISEL-NEXT: global_store_dwordx4 v[0:1], v[4:7], off
; GFX1012-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-ISEL-LABEL: global_store_i8_zext_vgpr:
; GFX1100-ISEL: ; %bb.0:
; GFX1100-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-ISEL-NEXT: global_load_b32 v2, v[2:3], off
; GFX1100-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX1100-ISEL-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2
; GFX1100-ISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-ISEL-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX1100-ISEL-NEXT: global_store_b128 v[0:1], v[4:7], off
; GFX1100-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-ISEL-LABEL: global_store_i8_zext_vgpr:
; GFX1250-ISEL: ; %bb.0:
; GFX1250-ISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-ISEL-NEXT: s_wait_kmcnt 0x0
; GFX1250-ISEL-NEXT: global_load_b32 v2, v[2:3], off
; GFX1250-ISEL-NEXT: s_wait_loadcnt 0x0
; GFX1250-ISEL-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2
; GFX1250-ISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1250-ISEL-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX1250-ISEL-NEXT: s_wait_xcnt 0x0
; GFX1250-ISEL-NEXT: global_store_b128 v[0:1], v[4:7], off
; GFX1250-ISEL-NEXT: s_set_pc_i64 s[30:31]
%voffset = load i32, ptr addrspace(1) %voffset.ptr
%zext.offset = zext i32 %voffset to i64
%gep0 = getelementptr inbounds i8, ptr addrspace(1) %sbase, i64 %zext.offset
call void @llvm.amdgcn.av.store.b128.p1(ptr addrspace(1) %gep0, <4 x i32> %data, metadata !0)
ret void
}
;; negative immediate offset
define void @global_store_v4i32_zext_vgpr_offset_neg128(ptr addrspace(1) %sbase, i32 %voffset, <4 x i32> %data) {
; GFX906-SDAG-LABEL: global_store_v4i32_zext_vgpr_offset_neg128:
; GFX906-SDAG: ; %bb.0:
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-SDAG-NEXT: v_add_co_u32_e32 v0, vcc, v0, v2
; GFX906-SDAG-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX906-SDAG-NEXT: global_store_dwordx4 v[0:1], v[3:6], off offset:-128
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX906-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-SDAG-LABEL: global_store_v4i32_zext_vgpr_offset_neg128:
; GFX942-SDAG: ; %bb.0:
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-SDAG-NEXT: v_mov_b32_e32 v7, v6
; GFX942-SDAG-NEXT: v_mov_b32_e32 v6, v5
; GFX942-SDAG-NEXT: v_mov_b32_e32 v5, v4
; GFX942-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX942-SDAG-NEXT: v_mov_b32_e32 v3, 0
; GFX942-SDAG-NEXT: v_lshl_add_u64 v[0:1], v[0:1], 0, v[2:3]
; GFX942-SDAG-NEXT: global_store_dwordx4 v[0:1], v[4:7], off offset:-128 sc0
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX942-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-SDAG-LABEL: global_store_v4i32_zext_vgpr_offset_neg128:
; GFX1012-SDAG: ; %bb.0:
; GFX1012-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-SDAG-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2
; GFX1012-SDAG-NEXT: v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
; GFX1012-SDAG-NEXT: global_store_dwordx4 v[0:1], v[3:6], off offset:-128
; GFX1012-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-SDAG-LABEL: global_store_v4i32_zext_vgpr_offset_neg128:
; GFX1100-SDAG: ; %bb.0:
; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-SDAG-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2
; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-SDAG-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX1100-SDAG-NEXT: global_store_b128 v[0:1], v[3:6], off offset:-128
; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-SDAG-LABEL: global_store_v4i32_zext_vgpr_offset_neg128:
; GFX1250-SDAG: ; %bb.0:
; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX1250-SDAG-NEXT: v_dual_mov_b32 v7, v6 :: v_dual_mov_b32 v6, v5
; GFX1250-SDAG-NEXT: v_dual_mov_b32 v5, v4 :: v_dual_mov_b32 v4, v3
; GFX1250-SDAG-NEXT: v_mov_b32_e32 v3, 0
; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1250-SDAG-NEXT: v_add_nc_u64_e32 v[0:1], v[0:1], v[2:3]
; GFX1250-SDAG-NEXT: global_store_b128 v[0:1], v[4:7], off offset:-128
; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX906-ISEL-LABEL: global_store_v4i32_zext_vgpr_offset_neg128:
; GFX906-ISEL: ; %bb.0:
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-ISEL-NEXT: v_add_co_u32_e32 v0, vcc, v0, v2
; GFX906-ISEL-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX906-ISEL-NEXT: global_store_dwordx4 v[0:1], v[3:6], off offset:-128
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX906-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-ISEL-LABEL: global_store_v4i32_zext_vgpr_offset_neg128:
; GFX942-ISEL: ; %bb.0:
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-ISEL-NEXT: v_add_co_u32_e32 v0, vcc, v0, v2
; GFX942-ISEL-NEXT: v_mov_b32_e32 v8, v3
; GFX942-ISEL-NEXT: v_mov_b32_e32 v9, v4
; GFX942-ISEL-NEXT: v_mov_b32_e32 v10, v5
; GFX942-ISEL-NEXT: v_mov_b32_e32 v11, v6
; GFX942-ISEL-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX942-ISEL-NEXT: global_store_dwordx4 v[0:1], v[8:11], off offset:-128 sc0
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX942-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-ISEL-LABEL: global_store_v4i32_zext_vgpr_offset_neg128:
; GFX1012-ISEL: ; %bb.0:
; GFX1012-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-ISEL-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2
; GFX1012-ISEL-NEXT: v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
; GFX1012-ISEL-NEXT: global_store_dwordx4 v[0:1], v[3:6], off offset:-128
; GFX1012-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-ISEL-LABEL: global_store_v4i32_zext_vgpr_offset_neg128:
; GFX1100-ISEL: ; %bb.0:
; GFX1100-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-ISEL-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2
; GFX1100-ISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-ISEL-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX1100-ISEL-NEXT: global_store_b128 v[0:1], v[3:6], off offset:-128
; GFX1100-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-ISEL-LABEL: global_store_v4i32_zext_vgpr_offset_neg128:
; GFX1250-ISEL: ; %bb.0:
; GFX1250-ISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-ISEL-NEXT: s_wait_kmcnt 0x0
; GFX1250-ISEL-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2
; GFX1250-ISEL-NEXT: v_dual_mov_b32 v8, v3 :: v_dual_mov_b32 v9, v4
; GFX1250-ISEL-NEXT: v_dual_mov_b32 v10, v5 :: v_dual_mov_b32 v11, v6
; GFX1250-ISEL-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX1250-ISEL-NEXT: global_store_b128 v[0:1], v[8:11], off offset:-128
; GFX1250-ISEL-NEXT: s_set_pc_i64 s[30:31]
%zext.offset = zext i32 %voffset to i64
%gep0 = getelementptr inbounds i8, ptr addrspace(1) %sbase, i64 %zext.offset
%gep1 = getelementptr inbounds i8, ptr addrspace(1) %gep0, i64 -128
call void @llvm.amdgcn.av.store.b128.p1(ptr addrspace(1) %gep1, <4 x i32> %data, metadata !1)
ret void
}
;; Maximum positive offset on gfx10
define void @global_store_i8_zext_vgpr_offset_2047(ptr addrspace(1) %sbase, ptr addrspace(1) %voffset.ptr, <4 x i32> %data) {
; GFX906-SDAG-LABEL: global_store_i8_zext_vgpr_offset_2047:
; GFX906-SDAG: ; %bb.0:
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-SDAG-NEXT: global_load_dword v2, v[2:3], off
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX906-SDAG-NEXT: v_add_co_u32_e32 v0, vcc, v0, v2
; GFX906-SDAG-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX906-SDAG-NEXT: global_store_dwordx4 v[0:1], v[4:7], off offset:2047
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX906-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-SDAG-LABEL: global_store_i8_zext_vgpr_offset_2047:
; GFX942-SDAG: ; %bb.0:
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-SDAG-NEXT: global_load_dword v2, v[2:3], off
; GFX942-SDAG-NEXT: v_mov_b32_e32 v3, 0
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX942-SDAG-NEXT: v_lshl_add_u64 v[0:1], v[0:1], 0, v[2:3]
; GFX942-SDAG-NEXT: global_store_dwordx4 v[0:1], v[4:7], off offset:2047 sc1
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX942-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-SDAG-LABEL: global_store_i8_zext_vgpr_offset_2047:
; GFX1012-SDAG: ; %bb.0:
; GFX1012-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-SDAG-NEXT: global_load_dword v2, v[2:3], off
; GFX1012-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX1012-SDAG-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2
; GFX1012-SDAG-NEXT: v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
; GFX1012-SDAG-NEXT: global_store_dwordx4 v[0:1], v[4:7], off offset:2047
; GFX1012-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-SDAG-LABEL: global_store_i8_zext_vgpr_offset_2047:
; GFX1100-SDAG: ; %bb.0:
; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-SDAG-NEXT: global_load_b32 v2, v[2:3], off
; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX1100-SDAG-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2
; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-SDAG-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX1100-SDAG-NEXT: global_store_b128 v[0:1], v[4:7], off offset:2047
; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-SDAG-LABEL: global_store_i8_zext_vgpr_offset_2047:
; GFX1250-SDAG: ; %bb.0:
; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX1250-SDAG-NEXT: global_load_b32 v2, v[2:3], off
; GFX1250-SDAG-NEXT: s_wait_xcnt 0x0
; GFX1250-SDAG-NEXT: v_mov_b32_e32 v3, 0
; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1250-SDAG-NEXT: v_add_nc_u64_e32 v[0:1], v[0:1], v[2:3]
; GFX1250-SDAG-NEXT: global_store_b128 v[0:1], v[4:7], off offset:2047 scope:SCOPE_DEV
; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX906-ISEL-LABEL: global_store_i8_zext_vgpr_offset_2047:
; GFX906-ISEL: ; %bb.0:
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-ISEL-NEXT: global_load_dword v2, v[2:3], off
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX906-ISEL-NEXT: v_add_co_u32_e32 v0, vcc, v0, v2
; GFX906-ISEL-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX906-ISEL-NEXT: global_store_dwordx4 v[0:1], v[4:7], off offset:2047
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX906-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-ISEL-LABEL: global_store_i8_zext_vgpr_offset_2047:
; GFX942-ISEL: ; %bb.0:
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-ISEL-NEXT: global_load_dword v2, v[2:3], off
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX942-ISEL-NEXT: v_add_co_u32_e32 v0, vcc, v0, v2
; GFX942-ISEL-NEXT: s_nop 1
; GFX942-ISEL-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX942-ISEL-NEXT: global_store_dwordx4 v[0:1], v[4:7], off offset:2047 sc1
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX942-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-ISEL-LABEL: global_store_i8_zext_vgpr_offset_2047:
; GFX1012-ISEL: ; %bb.0:
; GFX1012-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-ISEL-NEXT: global_load_dword v2, v[2:3], off
; GFX1012-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX1012-ISEL-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2
; GFX1012-ISEL-NEXT: v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
; GFX1012-ISEL-NEXT: global_store_dwordx4 v[0:1], v[4:7], off offset:2047
; GFX1012-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-ISEL-LABEL: global_store_i8_zext_vgpr_offset_2047:
; GFX1100-ISEL: ; %bb.0:
; GFX1100-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-ISEL-NEXT: global_load_b32 v2, v[2:3], off
; GFX1100-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX1100-ISEL-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2
; GFX1100-ISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-ISEL-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX1100-ISEL-NEXT: global_store_b128 v[0:1], v[4:7], off offset:2047
; GFX1100-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-ISEL-LABEL: global_store_i8_zext_vgpr_offset_2047:
; GFX1250-ISEL: ; %bb.0:
; GFX1250-ISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-ISEL-NEXT: s_wait_kmcnt 0x0
; GFX1250-ISEL-NEXT: global_load_b32 v2, v[2:3], off
; GFX1250-ISEL-NEXT: s_wait_loadcnt 0x0
; GFX1250-ISEL-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2
; GFX1250-ISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1250-ISEL-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX1250-ISEL-NEXT: s_wait_xcnt 0x0
; GFX1250-ISEL-NEXT: global_store_b128 v[0:1], v[4:7], off offset:2047 scope:SCOPE_DEV
; GFX1250-ISEL-NEXT: s_set_pc_i64 s[30:31]
%voffset = load i32, ptr addrspace(1) %voffset.ptr
%zext.offset = zext i32 %voffset to i64
%gep0 = getelementptr inbounds i8, ptr addrspace(1) %sbase, i64 %zext.offset
%gep1 = getelementptr inbounds i8, ptr addrspace(1) %gep0, i64 2047
call void @llvm.amdgcn.av.store.b128.p1(ptr addrspace(1) %gep1, <4 x i32> %data, metadata !2)
ret void
}
;; Maximum negative offset on gfx10
define void @global_store_i8_zext_vgpr_offset_neg2048(ptr addrspace(1) %sbase, ptr addrspace(1) %voffset.ptr, <4 x i32> %data) {
; GFX906-SDAG-LABEL: global_store_i8_zext_vgpr_offset_neg2048:
; GFX906-SDAG: ; %bb.0:
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-SDAG-NEXT: global_load_dword v2, v[2:3], off
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX906-SDAG-NEXT: v_add_co_u32_e32 v0, vcc, v0, v2
; GFX906-SDAG-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX906-SDAG-NEXT: global_store_dwordx4 v[0:1], v[4:7], off offset:-2048
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX906-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-SDAG-LABEL: global_store_i8_zext_vgpr_offset_neg2048:
; GFX942-SDAG: ; %bb.0:
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-SDAG-NEXT: global_load_dword v2, v[2:3], off
; GFX942-SDAG-NEXT: v_mov_b32_e32 v3, 0
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX942-SDAG-NEXT: v_lshl_add_u64 v[0:1], v[0:1], 0, v[2:3]
; GFX942-SDAG-NEXT: global_store_dwordx4 v[0:1], v[4:7], off offset:-2048 sc0 sc1
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX942-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-SDAG-LABEL: global_store_i8_zext_vgpr_offset_neg2048:
; GFX1012-SDAG: ; %bb.0:
; GFX1012-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-SDAG-NEXT: global_load_dword v2, v[2:3], off
; GFX1012-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX1012-SDAG-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2
; GFX1012-SDAG-NEXT: v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
; GFX1012-SDAG-NEXT: global_store_dwordx4 v[0:1], v[4:7], off offset:-2048
; GFX1012-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-SDAG-LABEL: global_store_i8_zext_vgpr_offset_neg2048:
; GFX1100-SDAG: ; %bb.0:
; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-SDAG-NEXT: global_load_b32 v2, v[2:3], off
; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX1100-SDAG-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2
; GFX1100-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-SDAG-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX1100-SDAG-NEXT: global_store_b128 v[0:1], v[4:7], off offset:-2048
; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-SDAG-LABEL: global_store_i8_zext_vgpr_offset_neg2048:
; GFX1250-SDAG: ; %bb.0:
; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX1250-SDAG-NEXT: global_load_b32 v2, v[2:3], off
; GFX1250-SDAG-NEXT: s_wait_xcnt 0x0
; GFX1250-SDAG-NEXT: v_mov_b32_e32 v3, 0
; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX1250-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1250-SDAG-NEXT: v_add_nc_u64_e32 v[0:1], v[0:1], v[2:3]
; GFX1250-SDAG-NEXT: global_store_b128 v[0:1], v[4:7], off offset:-2048 scope:SCOPE_SYS
; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX906-ISEL-LABEL: global_store_i8_zext_vgpr_offset_neg2048:
; GFX906-ISEL: ; %bb.0:
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-ISEL-NEXT: global_load_dword v2, v[2:3], off
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX906-ISEL-NEXT: v_add_co_u32_e32 v0, vcc, v0, v2
; GFX906-ISEL-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX906-ISEL-NEXT: global_store_dwordx4 v[0:1], v[4:7], off offset:-2048
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX906-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-ISEL-LABEL: global_store_i8_zext_vgpr_offset_neg2048:
; GFX942-ISEL: ; %bb.0:
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-ISEL-NEXT: global_load_dword v2, v[2:3], off
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX942-ISEL-NEXT: v_add_co_u32_e32 v0, vcc, v0, v2
; GFX942-ISEL-NEXT: s_nop 1
; GFX942-ISEL-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX942-ISEL-NEXT: global_store_dwordx4 v[0:1], v[4:7], off offset:-2048 sc0 sc1
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX942-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-ISEL-LABEL: global_store_i8_zext_vgpr_offset_neg2048:
; GFX1012-ISEL: ; %bb.0:
; GFX1012-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-ISEL-NEXT: global_load_dword v2, v[2:3], off
; GFX1012-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX1012-ISEL-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2
; GFX1012-ISEL-NEXT: v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
; GFX1012-ISEL-NEXT: global_store_dwordx4 v[0:1], v[4:7], off offset:-2048
; GFX1012-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-ISEL-LABEL: global_store_i8_zext_vgpr_offset_neg2048:
; GFX1100-ISEL: ; %bb.0:
; GFX1100-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-ISEL-NEXT: global_load_b32 v2, v[2:3], off
; GFX1100-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX1100-ISEL-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2
; GFX1100-ISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-ISEL-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX1100-ISEL-NEXT: global_store_b128 v[0:1], v[4:7], off offset:-2048
; GFX1100-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-ISEL-LABEL: global_store_i8_zext_vgpr_offset_neg2048:
; GFX1250-ISEL: ; %bb.0:
; GFX1250-ISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-ISEL-NEXT: s_wait_kmcnt 0x0
; GFX1250-ISEL-NEXT: global_load_b32 v2, v[2:3], off
; GFX1250-ISEL-NEXT: s_wait_loadcnt 0x0
; GFX1250-ISEL-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2
; GFX1250-ISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1250-ISEL-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX1250-ISEL-NEXT: s_wait_xcnt 0x0
; GFX1250-ISEL-NEXT: global_store_b128 v[0:1], v[4:7], off offset:-2048 scope:SCOPE_SYS
; GFX1250-ISEL-NEXT: s_set_pc_i64 s[30:31]
%voffset = load i32, ptr addrspace(1) %voffset.ptr
%zext.offset = zext i32 %voffset to i64
%gep0 = getelementptr inbounds i8, ptr addrspace(1) %sbase, i64 %zext.offset
%gep1 = getelementptr inbounds i8, ptr addrspace(1) %gep0, i64 -2048
call void @llvm.amdgcn.av.store.b128.p1(ptr addrspace(1) %gep1, <4 x i32> %data, metadata !3)
ret void
}
;;==============================================================================
;; Various saddr addressing modes (derived from global-saddr-load.ll)
;;==============================================================================
;; basic saddr pattern, no immediate offset
define void @global_store_saddr_i8_zext_vgpr(ptr addrspace(1) inreg %sbase, ptr addrspace(1) %voffset.ptr, <4 x i32> %data) {
; GFX906-SDAG-LABEL: global_store_saddr_i8_zext_vgpr:
; GFX906-SDAG: ; %bb.0:
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-SDAG-NEXT: global_load_dword v0, v[0:1], off
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX906-SDAG-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17]
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX906-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-SDAG-LABEL: global_store_saddr_i8_zext_vgpr:
; GFX942-SDAG: ; %bb.0:
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-SDAG-NEXT: global_load_dword v0, v[0:1], off
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX942-SDAG-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1]
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX942-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-SDAG-LABEL: global_store_saddr_i8_zext_vgpr:
; GFX1012-SDAG: ; %bb.0:
; GFX1012-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-SDAG-NEXT: global_load_dword v0, v[0:1], off
; GFX1012-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX1012-SDAG-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17]
; GFX1012-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-SDAG-LABEL: global_store_saddr_i8_zext_vgpr:
; GFX1100-SDAG: ; %bb.0:
; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-SDAG-NEXT: global_load_b32 v0, v[0:1], off
; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX1100-SDAG-NEXT: global_store_b128 v0, v[2:5], s[0:1]
; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-SDAG-LABEL: global_store_saddr_i8_zext_vgpr:
; GFX1250-SDAG: ; %bb.0:
; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX1250-SDAG-NEXT: global_load_b32 v0, v[0:1], off
; GFX1250-SDAG-NEXT: s_wait_xcnt 0x0
; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX1250-SDAG-NEXT: global_store_b128 v0, v[2:5], s[0:1]
; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX906-ISEL-LABEL: global_store_saddr_i8_zext_vgpr:
; GFX906-ISEL: ; %bb.0:
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-ISEL-NEXT: global_load_dword v0, v[0:1], off
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX906-ISEL-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17]
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX906-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-ISEL-LABEL: global_store_saddr_i8_zext_vgpr:
; GFX942-ISEL: ; %bb.0:
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-ISEL-NEXT: global_load_dword v0, v[0:1], off
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX942-ISEL-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1]
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX942-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-ISEL-LABEL: global_store_saddr_i8_zext_vgpr:
; GFX1012-ISEL: ; %bb.0:
; GFX1012-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-ISEL-NEXT: global_load_dword v0, v[0:1], off
; GFX1012-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX1012-ISEL-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17]
; GFX1012-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-ISEL-LABEL: global_store_saddr_i8_zext_vgpr:
; GFX1100-ISEL: ; %bb.0:
; GFX1100-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-ISEL-NEXT: global_load_b32 v0, v[0:1], off
; GFX1100-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX1100-ISEL-NEXT: global_store_b128 v0, v[2:5], s[0:1]
; GFX1100-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-ISEL-LABEL: global_store_saddr_i8_zext_vgpr:
; GFX1250-ISEL: ; %bb.0:
; GFX1250-ISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-ISEL-NEXT: s_wait_kmcnt 0x0
; GFX1250-ISEL-NEXT: global_load_b32 v0, v[0:1], off
; GFX1250-ISEL-NEXT: s_wait_xcnt 0x0
; GFX1250-ISEL-NEXT: s_wait_loadcnt 0x0
; GFX1250-ISEL-NEXT: global_store_b128 v0, v[2:5], s[0:1]
; GFX1250-ISEL-NEXT: s_set_pc_i64 s[30:31]
%voffset = load i32, ptr addrspace(1) %voffset.ptr
%zext.offset = zext i32 %voffset to i64
%gep0 = getelementptr inbounds i8, ptr addrspace(1) %sbase, i64 %zext.offset
call void @llvm.amdgcn.av.store.b128.p1(ptr addrspace(1) %gep0, <4 x i32> %data, metadata !0)
ret void
}
;; saddr with negative immediate offset
define void @global_store_saddr_v4i32_zext_vgpr_offset_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, <4 x i32> %data) {
; GFX906-SDAG-LABEL: global_store_saddr_v4i32_zext_vgpr_offset_neg128:
; GFX906-SDAG: ; %bb.0:
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-SDAG-NEXT: global_store_dwordx4 v0, v[1:4], s[16:17] offset:-128
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX906-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-SDAG-LABEL: global_store_saddr_v4i32_zext_vgpr_offset_neg128:
; GFX942-SDAG: ; %bb.0:
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-SDAG-NEXT: v_mov_b32_e32 v5, v4
; GFX942-SDAG-NEXT: v_mov_b32_e32 v4, v3
; GFX942-SDAG-NEXT: v_mov_b32_e32 v3, v2
; GFX942-SDAG-NEXT: v_mov_b32_e32 v2, v1
; GFX942-SDAG-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1] offset:-128 sc0
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX942-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-SDAG-LABEL: global_store_saddr_v4i32_zext_vgpr_offset_neg128:
; GFX1012-SDAG: ; %bb.0:
; GFX1012-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-SDAG-NEXT: global_store_dwordx4 v0, v[1:4], s[16:17] offset:-128
; GFX1012-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-SDAG-LABEL: global_store_saddr_v4i32_zext_vgpr_offset_neg128:
; GFX1100-SDAG: ; %bb.0:
; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-SDAG-NEXT: global_store_b128 v0, v[1:4], s[0:1] offset:-128
; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-SDAG-LABEL: global_store_saddr_v4i32_zext_vgpr_offset_neg128:
; GFX1250-SDAG: ; %bb.0:
; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX1250-SDAG-NEXT: v_dual_mov_b32 v5, v4 :: v_dual_mov_b32 v4, v3
; GFX1250-SDAG-NEXT: v_dual_mov_b32 v3, v2 :: v_dual_mov_b32 v2, v1
; GFX1250-SDAG-NEXT: global_store_b128 v0, v[2:5], s[0:1] offset:-128
; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX906-ISEL-LABEL: global_store_saddr_v4i32_zext_vgpr_offset_neg128:
; GFX906-ISEL: ; %bb.0:
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-ISEL-NEXT: global_store_dwordx4 v0, v[1:4], s[16:17] offset:-128
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX906-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-ISEL-LABEL: global_store_saddr_v4i32_zext_vgpr_offset_neg128:
; GFX942-ISEL: ; %bb.0:
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-ISEL-NEXT: v_mov_b32_e32 v6, v1
; GFX942-ISEL-NEXT: v_mov_b32_e32 v7, v2
; GFX942-ISEL-NEXT: v_mov_b32_e32 v8, v3
; GFX942-ISEL-NEXT: v_mov_b32_e32 v9, v4
; GFX942-ISEL-NEXT: global_store_dwordx4 v0, v[6:9], s[0:1] offset:-128 sc0
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX942-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-ISEL-LABEL: global_store_saddr_v4i32_zext_vgpr_offset_neg128:
; GFX1012-ISEL: ; %bb.0:
; GFX1012-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-ISEL-NEXT: global_store_dwordx4 v0, v[1:4], s[16:17] offset:-128
; GFX1012-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-ISEL-LABEL: global_store_saddr_v4i32_zext_vgpr_offset_neg128:
; GFX1100-ISEL: ; %bb.0:
; GFX1100-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-ISEL-NEXT: global_store_b128 v0, v[1:4], s[0:1] offset:-128
; GFX1100-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-ISEL-LABEL: global_store_saddr_v4i32_zext_vgpr_offset_neg128:
; GFX1250-ISEL: ; %bb.0:
; GFX1250-ISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-ISEL-NEXT: s_wait_kmcnt 0x0
; GFX1250-ISEL-NEXT: v_dual_mov_b32 v6, v1 :: v_dual_mov_b32 v7, v2
; GFX1250-ISEL-NEXT: v_dual_mov_b32 v8, v3 :: v_dual_mov_b32 v9, v4
; GFX1250-ISEL-NEXT: global_store_b128 v0, v[6:9], s[0:1] offset:-128
; GFX1250-ISEL-NEXT: s_set_pc_i64 s[30:31]
%zext.offset = zext i32 %voffset to i64
%gep0 = getelementptr inbounds i8, ptr addrspace(1) %sbase, i64 %zext.offset
%gep1 = getelementptr inbounds i8, ptr addrspace(1) %gep0, i64 -128
call void @llvm.amdgcn.av.store.b128.p1(ptr addrspace(1) %gep1, <4 x i32> %data, metadata !1)
ret void
}
;; Maximum positive offset on gfx10
define void @global_store_saddr_i8_zext_vgpr_offset_2047(ptr addrspace(1) inreg %sbase, ptr addrspace(1) %voffset.ptr, <4 x i32> %data) {
; GFX906-SDAG-LABEL: global_store_saddr_i8_zext_vgpr_offset_2047:
; GFX906-SDAG: ; %bb.0:
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-SDAG-NEXT: global_load_dword v0, v[0:1], off
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX906-SDAG-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] offset:2047
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX906-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-SDAG-LABEL: global_store_saddr_i8_zext_vgpr_offset_2047:
; GFX942-SDAG: ; %bb.0:
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-SDAG-NEXT: global_load_dword v0, v[0:1], off
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX942-SDAG-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1] offset:2047 sc1
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX942-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-SDAG-LABEL: global_store_saddr_i8_zext_vgpr_offset_2047:
; GFX1012-SDAG: ; %bb.0:
; GFX1012-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-SDAG-NEXT: global_load_dword v0, v[0:1], off
; GFX1012-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX1012-SDAG-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] offset:2047
; GFX1012-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-SDAG-LABEL: global_store_saddr_i8_zext_vgpr_offset_2047:
; GFX1100-SDAG: ; %bb.0:
; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-SDAG-NEXT: global_load_b32 v0, v[0:1], off
; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX1100-SDAG-NEXT: global_store_b128 v0, v[2:5], s[0:1] offset:2047
; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-SDAG-LABEL: global_store_saddr_i8_zext_vgpr_offset_2047:
; GFX1250-SDAG: ; %bb.0:
; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX1250-SDAG-NEXT: global_load_b32 v0, v[0:1], off
; GFX1250-SDAG-NEXT: s_wait_xcnt 0x0
; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX1250-SDAG-NEXT: global_store_b128 v0, v[2:5], s[0:1] offset:2047 scope:SCOPE_DEV
; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX906-ISEL-LABEL: global_store_saddr_i8_zext_vgpr_offset_2047:
; GFX906-ISEL: ; %bb.0:
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-ISEL-NEXT: global_load_dword v0, v[0:1], off
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX906-ISEL-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] offset:2047
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX906-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-ISEL-LABEL: global_store_saddr_i8_zext_vgpr_offset_2047:
; GFX942-ISEL: ; %bb.0:
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-ISEL-NEXT: global_load_dword v0, v[0:1], off
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX942-ISEL-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1] offset:2047 sc1
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX942-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-ISEL-LABEL: global_store_saddr_i8_zext_vgpr_offset_2047:
; GFX1012-ISEL: ; %bb.0:
; GFX1012-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-ISEL-NEXT: global_load_dword v0, v[0:1], off
; GFX1012-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX1012-ISEL-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] offset:2047
; GFX1012-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-ISEL-LABEL: global_store_saddr_i8_zext_vgpr_offset_2047:
; GFX1100-ISEL: ; %bb.0:
; GFX1100-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-ISEL-NEXT: global_load_b32 v0, v[0:1], off
; GFX1100-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX1100-ISEL-NEXT: global_store_b128 v0, v[2:5], s[0:1] offset:2047
; GFX1100-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-ISEL-LABEL: global_store_saddr_i8_zext_vgpr_offset_2047:
; GFX1250-ISEL: ; %bb.0:
; GFX1250-ISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-ISEL-NEXT: s_wait_kmcnt 0x0
; GFX1250-ISEL-NEXT: global_load_b32 v0, v[0:1], off
; GFX1250-ISEL-NEXT: s_wait_xcnt 0x0
; GFX1250-ISEL-NEXT: s_wait_loadcnt 0x0
; GFX1250-ISEL-NEXT: global_store_b128 v0, v[2:5], s[0:1] offset:2047 scope:SCOPE_DEV
; GFX1250-ISEL-NEXT: s_set_pc_i64 s[30:31]
%voffset = load i32, ptr addrspace(1) %voffset.ptr
%zext.offset = zext i32 %voffset to i64
%gep0 = getelementptr inbounds i8, ptr addrspace(1) %sbase, i64 %zext.offset
%gep1 = getelementptr inbounds i8, ptr addrspace(1) %gep0, i64 2047
call void @llvm.amdgcn.av.store.b128.p1(ptr addrspace(1) %gep1, <4 x i32> %data, metadata !2)
ret void
}
;; Maximum negative offset on gfx10
define void @global_store_saddr_i8_zext_vgpr_offset_neg2048(ptr addrspace(1) inreg %sbase, ptr addrspace(1) %voffset.ptr, <4 x i32> %data) {
; GFX906-SDAG-LABEL: global_store_saddr_i8_zext_vgpr_offset_neg2048:
; GFX906-SDAG: ; %bb.0:
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-SDAG-NEXT: global_load_dword v0, v[0:1], off
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX906-SDAG-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] offset:-2048
; GFX906-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX906-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-SDAG-LABEL: global_store_saddr_i8_zext_vgpr_offset_neg2048:
; GFX942-SDAG: ; %bb.0:
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-SDAG-NEXT: global_load_dword v0, v[0:1], off
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX942-SDAG-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1] offset:-2048 sc0 sc1
; GFX942-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX942-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-SDAG-LABEL: global_store_saddr_i8_zext_vgpr_offset_neg2048:
; GFX1012-SDAG: ; %bb.0:
; GFX1012-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-SDAG-NEXT: global_load_dword v0, v[0:1], off
; GFX1012-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX1012-SDAG-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] offset:-2048
; GFX1012-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-SDAG-LABEL: global_store_saddr_i8_zext_vgpr_offset_neg2048:
; GFX1100-SDAG: ; %bb.0:
; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-SDAG-NEXT: global_load_b32 v0, v[0:1], off
; GFX1100-SDAG-NEXT: s_waitcnt vmcnt(0)
; GFX1100-SDAG-NEXT: global_store_b128 v0, v[2:5], s[0:1] offset:-2048
; GFX1100-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-SDAG-LABEL: global_store_saddr_i8_zext_vgpr_offset_neg2048:
; GFX1250-SDAG: ; %bb.0:
; GFX1250-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX1250-SDAG-NEXT: global_load_b32 v0, v[0:1], off
; GFX1250-SDAG-NEXT: s_wait_xcnt 0x0
; GFX1250-SDAG-NEXT: s_wait_loadcnt 0x0
; GFX1250-SDAG-NEXT: global_store_b128 v0, v[2:5], s[0:1] offset:-2048 scope:SCOPE_SYS
; GFX1250-SDAG-NEXT: s_set_pc_i64 s[30:31]
;
; GFX906-ISEL-LABEL: global_store_saddr_i8_zext_vgpr_offset_neg2048:
; GFX906-ISEL: ; %bb.0:
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX906-ISEL-NEXT: global_load_dword v0, v[0:1], off
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX906-ISEL-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] offset:-2048
; GFX906-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX906-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX942-ISEL-LABEL: global_store_saddr_i8_zext_vgpr_offset_neg2048:
; GFX942-ISEL: ; %bb.0:
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX942-ISEL-NEXT: global_load_dword v0, v[0:1], off
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX942-ISEL-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1] offset:-2048 sc0 sc1
; GFX942-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX942-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1012-ISEL-LABEL: global_store_saddr_i8_zext_vgpr_offset_neg2048:
; GFX1012-ISEL: ; %bb.0:
; GFX1012-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1012-ISEL-NEXT: global_load_dword v0, v[0:1], off
; GFX1012-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX1012-ISEL-NEXT: global_store_dwordx4 v0, v[2:5], s[16:17] offset:-2048
; GFX1012-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1100-ISEL-LABEL: global_store_saddr_i8_zext_vgpr_offset_neg2048:
; GFX1100-ISEL: ; %bb.0:
; GFX1100-ISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-ISEL-NEXT: global_load_b32 v0, v[0:1], off
; GFX1100-ISEL-NEXT: s_waitcnt vmcnt(0)
; GFX1100-ISEL-NEXT: global_store_b128 v0, v[2:5], s[0:1] offset:-2048
; GFX1100-ISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX1250-ISEL-LABEL: global_store_saddr_i8_zext_vgpr_offset_neg2048:
; GFX1250-ISEL: ; %bb.0:
; GFX1250-ISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX1250-ISEL-NEXT: s_wait_kmcnt 0x0
; GFX1250-ISEL-NEXT: global_load_b32 v0, v[0:1], off
; GFX1250-ISEL-NEXT: s_wait_xcnt 0x0
; GFX1250-ISEL-NEXT: s_wait_loadcnt 0x0
; GFX1250-ISEL-NEXT: global_store_b128 v0, v[2:5], s[0:1] offset:-2048 scope:SCOPE_SYS
; GFX1250-ISEL-NEXT: s_set_pc_i64 s[30:31]
%voffset = load i32, ptr addrspace(1) %voffset.ptr
%zext.offset = zext i32 %voffset to i64
%gep0 = getelementptr inbounds i8, ptr addrspace(1) %sbase, i64 %zext.offset
%gep1 = getelementptr inbounds i8, ptr addrspace(1) %gep0, i64 -2048
call void @llvm.amdgcn.av.store.b128.p1(ptr addrspace(1) %gep1, <4 x i32> %data, metadata !3)
ret void
}
;;------------------------------------------------------------------------------
;; Uniformity edge cases
;;------------------------------------------------------------------------------
@ptr.in.lds = internal addrspace(3) global ptr addrspace(1) poison
;; Base pointer is uniform, but also in VGPRs
define amdgpu_kernel void @global_store_saddr_uniform_ptr_in_vgprs(i32 %voffset, <4 x i32> %data) {
; GFX906-SDAG-LABEL: global_store_saddr_uniform_ptr_in_vgprs:
; GFX906-SDAG: ; %bb.0:
; GFX906-SDAG-NEXT: s_load_dword s6, s[4:5], 0x24
; GFX906-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34
; GFX906-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX906-SDAG-NEXT: ds_read_b64 v[4:5], v0
; GFX906-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX906-SDAG-NEXT: v_mov_b32_e32 v6, s6
; GFX906-SDAG-NEXT: v_mov_b32_e32 v0, s0
; GFX906-SDAG-NEXT: v_mov_b32_e32 v1, s1
; GFX906-SDAG-NEXT: v_mov_b32_e32 v2, s2
; GFX906-SDAG-NEXT: v_mov_b32_e32 v3, s3
; GFX906-SDAG-NEXT: v_readfirstlane_b32 s0, v4
; GFX906-SDAG-NEXT: v_readfirstlane_b32 s1, v5
; GFX906-SDAG-NEXT: s_nop 4
; GFX906-SDAG-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX906-SDAG-NEXT: s_endpgm
;
; GFX942-SDAG-LABEL: global_store_saddr_uniform_ptr_in_vgprs:
; GFX942-SDAG: ; %bb.0:
; GFX942-SDAG-NEXT: s_load_dword s6, s[4:5], 0x24
; GFX942-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34
; GFX942-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX942-SDAG-NEXT: ds_read_b64 v[0:1], v0
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX942-SDAG-NEXT: v_mov_b32_e32 v2, s6
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[2:3]
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[0:1]
; GFX942-SDAG-NEXT: v_readfirstlane_b32 s0, v0
; GFX942-SDAG-NEXT: v_readfirstlane_b32 s1, v1
; GFX942-SDAG-NEXT: s_nop 4
; GFX942-SDAG-NEXT: global_store_dwordx4 v2, v[4:7], s[0:1]
; GFX942-SDAG-NEXT: s_endpgm
;
; GFX1012-SDAG-LABEL: global_store_saddr_uniform_ptr_in_vgprs:
; GFX1012-SDAG: ; %bb.0:
; GFX1012-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX1012-SDAG-NEXT: s_clause 0x1
; GFX1012-SDAG-NEXT: s_load_dword s6, s[4:5], 0x24
; GFX1012-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34
; GFX1012-SDAG-NEXT: ds_read_b64 v[4:5], v0
; GFX1012-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX1012-SDAG-NEXT: v_mov_b32_e32 v6, s6
; GFX1012-SDAG-NEXT: v_mov_b32_e32 v0, s0
; GFX1012-SDAG-NEXT: v_mov_b32_e32 v1, s1
; GFX1012-SDAG-NEXT: v_mov_b32_e32 v2, s2
; GFX1012-SDAG-NEXT: v_mov_b32_e32 v3, s3
; GFX1012-SDAG-NEXT: v_readfirstlane_b32 s0, v4
; GFX1012-SDAG-NEXT: v_readfirstlane_b32 s1, v5
; GFX1012-SDAG-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]
; GFX1012-SDAG-NEXT: s_endpgm
;
; GFX1100-SDAG-LABEL: global_store_saddr_uniform_ptr_in_vgprs:
; GFX1100-SDAG: ; %bb.0:
; GFX1100-SDAG-NEXT: s_clause 0x1
; GFX1100-SDAG-NEXT: s_load_b32 s6, s[4:5], 0x24
; GFX1100-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x34
; GFX1100-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX1100-SDAG-NEXT: ds_load_b64 v[4:5], v0
; GFX1100-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX1100-SDAG-NEXT: v_mov_b32_e32 v6, s6
; GFX1100-SDAG-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX1100-SDAG-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX1100-SDAG-NEXT: v_readfirstlane_b32 s0, v4
; GFX1100-SDAG-NEXT: v_readfirstlane_b32 s1, v5
; GFX1100-SDAG-NEXT: global_store_b128 v6, v[0:3], s[0:1]
; GFX1100-SDAG-NEXT: s_endpgm
;
; GFX1250-SDAG-LABEL: global_store_saddr_uniform_ptr_in_vgprs:
; GFX1250-SDAG: ; %bb.0:
; GFX1250-SDAG-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
; GFX1250-SDAG-NEXT: v_nop
; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-SDAG-NEXT: s_clause 0x1
; GFX1250-SDAG-NEXT: s_load_b32 s6, s[4:5], 0x24 nv
; GFX1250-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x34 nv
; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX1250-SDAG-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v6, s6
; GFX1250-SDAG-NEXT: ds_load_b64 v[4:5], v0
; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GFX1250-SDAG-NEXT: s_wait_dscnt 0x0
; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s0, v4
; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s1, v5
; GFX1250-SDAG-NEXT: global_store_b128 v6, v[0:3], s[0:1]
; GFX1250-SDAG-NEXT: s_endpgm
;
; GFX906-ISEL-LABEL: global_store_saddr_uniform_ptr_in_vgprs:
; GFX906-ISEL: ; %bb.0:
; GFX906-ISEL-NEXT: s_load_dword s6, s[4:5], 0x24
; GFX906-ISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34
; GFX906-ISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX906-ISEL-NEXT: ds_read_b64 v[0:1], v0
; GFX906-ISEL-NEXT: s_mov_b32 s7, 0
; GFX906-ISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX906-ISEL-NEXT: v_mov_b32_e32 v2, s6
; GFX906-ISEL-NEXT: v_mov_b32_e32 v3, s7
; GFX906-ISEL-NEXT: v_add_co_u32_e32 v4, vcc, v0, v2
; GFX906-ISEL-NEXT: v_addc_co_u32_e32 v5, vcc, v1, v3, vcc
; GFX906-ISEL-NEXT: v_mov_b32_e32 v0, s0
; GFX906-ISEL-NEXT: v_mov_b32_e32 v1, s1
; GFX906-ISEL-NEXT: v_mov_b32_e32 v2, s2
; GFX906-ISEL-NEXT: v_mov_b32_e32 v3, s3
; GFX906-ISEL-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
; GFX906-ISEL-NEXT: s_endpgm
;
; GFX942-ISEL-LABEL: global_store_saddr_uniform_ptr_in_vgprs:
; GFX942-ISEL: ; %bb.0:
; GFX942-ISEL-NEXT: s_load_dword s6, s[4:5], 0x24
; GFX942-ISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34
; GFX942-ISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX942-ISEL-NEXT: ds_read_b64 v[0:1], v0
; GFX942-ISEL-NEXT: s_mov_b32 s7, 0
; GFX942-ISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX942-ISEL-NEXT: v_mov_b64_e32 v[2:3], s[6:7]
; GFX942-ISEL-NEXT: v_add_co_u32_e32 v4, vcc, v0, v2
; GFX942-ISEL-NEXT: s_nop 1
; GFX942-ISEL-NEXT: v_addc_co_u32_e32 v5, vcc, v1, v3, vcc
; GFX942-ISEL-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX942-ISEL-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GFX942-ISEL-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
; GFX942-ISEL-NEXT: s_endpgm
;
; GFX1012-ISEL-LABEL: global_store_saddr_uniform_ptr_in_vgprs:
; GFX1012-ISEL: ; %bb.0:
; GFX1012-ISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX1012-ISEL-NEXT: s_clause 0x1
; GFX1012-ISEL-NEXT: s_load_dword s6, s[4:5], 0x24
; GFX1012-ISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34
; GFX1012-ISEL-NEXT: s_mov_b32 s7, 0
; GFX1012-ISEL-NEXT: ds_read_b64 v[0:1], v0
; GFX1012-ISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX1012-ISEL-NEXT: v_mov_b32_e32 v2, s6
; GFX1012-ISEL-NEXT: v_mov_b32_e32 v3, s7
; GFX1012-ISEL-NEXT: v_add_co_u32 v4, vcc_lo, v0, v2
; GFX1012-ISEL-NEXT: v_add_co_ci_u32_e32 v5, vcc_lo, v1, v3, vcc_lo
; GFX1012-ISEL-NEXT: v_mov_b32_e32 v0, s0
; GFX1012-ISEL-NEXT: v_mov_b32_e32 v1, s1
; GFX1012-ISEL-NEXT: v_mov_b32_e32 v2, s2
; GFX1012-ISEL-NEXT: v_mov_b32_e32 v3, s3
; GFX1012-ISEL-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
; GFX1012-ISEL-NEXT: s_endpgm
;
; GFX1100-ISEL-LABEL: global_store_saddr_uniform_ptr_in_vgprs:
; GFX1100-ISEL: ; %bb.0:
; GFX1100-ISEL-NEXT: s_clause 0x1
; GFX1100-ISEL-NEXT: s_load_b32 s6, s[4:5], 0x24
; GFX1100-ISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x34
; GFX1100-ISEL-NEXT: s_mov_b32 s7, 0
; GFX1100-ISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX1100-ISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX1100-ISEL-NEXT: v_dual_mov_b32 v2, s6 :: v_dual_mov_b32 v3, s7
; GFX1100-ISEL-NEXT: ds_load_b64 v[0:1], v0
; GFX1100-ISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX1100-ISEL-NEXT: v_add_co_u32 v4, vcc_lo, v0, v2
; GFX1100-ISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-ISEL-NEXT: v_add_co_ci_u32_e64 v5, null, v1, v3, vcc_lo
; GFX1100-ISEL-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v3, s3
; GFX1100-ISEL-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v2, s2
; GFX1100-ISEL-NEXT: global_store_b128 v[4:5], v[0:3], off
; GFX1100-ISEL-NEXT: s_endpgm
;
; GFX1250-ISEL-LABEL: global_store_saddr_uniform_ptr_in_vgprs:
; GFX1250-ISEL: ; %bb.0:
; GFX1250-ISEL-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
; GFX1250-ISEL-NEXT: v_nop
; GFX1250-ISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-ISEL-NEXT: s_clause 0x1
; GFX1250-ISEL-NEXT: s_load_b32 s6, s[4:5], 0x24 nv
; GFX1250-ISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x34 nv
; GFX1250-ISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX1250-ISEL-NEXT: s_mov_b32 s7, 0
; GFX1250-ISEL-NEXT: ds_load_b64 v[0:1], v0
; GFX1250-ISEL-NEXT: s_wait_kmcnt 0x0
; GFX1250-ISEL-NEXT: v_mov_b64_e32 v[2:3], s[6:7]
; GFX1250-ISEL-NEXT: s_wait_dscnt 0x0
; GFX1250-ISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1250-ISEL-NEXT: v_add_co_u32 v4, vcc_lo, v0, v2
; GFX1250-ISEL-NEXT: v_add_co_ci_u32_e64 v5, null, v1, v3, vcc_lo
; GFX1250-ISEL-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX1250-ISEL-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GFX1250-ISEL-NEXT: global_store_b128 v[4:5], v[0:3], off
; GFX1250-ISEL-NEXT: s_endpgm
%sbase = load ptr addrspace(1), ptr addrspace(3) @ptr.in.lds
%zext.offset = zext i32 %voffset to i64
%gep0 = getelementptr inbounds i8, ptr addrspace(1) %sbase, i64 %zext.offset
call void @llvm.amdgcn.av.store.b128.p1(ptr addrspace(1) %gep0, <4 x i32> %data, metadata !0)
ret void
}
;; Base pointer is uniform, but also in VGPRs, with imm offset
define amdgpu_kernel void @global_store_saddr_uniform_ptr_in_vgprs_immoffset(i32 %voffset, <4 x i32> %data) {
; GFX906-SDAG-LABEL: global_store_saddr_uniform_ptr_in_vgprs_immoffset:
; GFX906-SDAG: ; %bb.0:
; GFX906-SDAG-NEXT: s_load_dword s6, s[4:5], 0x24
; GFX906-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34
; GFX906-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX906-SDAG-NEXT: ds_read_b64 v[4:5], v0
; GFX906-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX906-SDAG-NEXT: v_mov_b32_e32 v6, s6
; GFX906-SDAG-NEXT: v_mov_b32_e32 v0, s0
; GFX906-SDAG-NEXT: v_mov_b32_e32 v1, s1
; GFX906-SDAG-NEXT: v_mov_b32_e32 v2, s2
; GFX906-SDAG-NEXT: v_mov_b32_e32 v3, s3
; GFX906-SDAG-NEXT: v_readfirstlane_b32 s0, v4
; GFX906-SDAG-NEXT: v_readfirstlane_b32 s1, v5
; GFX906-SDAG-NEXT: s_nop 4
; GFX906-SDAG-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1] offset:-120
; GFX906-SDAG-NEXT: s_endpgm
;
; GFX942-SDAG-LABEL: global_store_saddr_uniform_ptr_in_vgprs_immoffset:
; GFX942-SDAG: ; %bb.0:
; GFX942-SDAG-NEXT: s_load_dword s6, s[4:5], 0x24
; GFX942-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34
; GFX942-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX942-SDAG-NEXT: ds_read_b64 v[0:1], v0
; GFX942-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX942-SDAG-NEXT: v_mov_b32_e32 v2, s6
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[6:7], s[2:3]
; GFX942-SDAG-NEXT: v_mov_b64_e32 v[4:5], s[0:1]
; GFX942-SDAG-NEXT: v_readfirstlane_b32 s0, v0
; GFX942-SDAG-NEXT: v_readfirstlane_b32 s1, v1
; GFX942-SDAG-NEXT: s_nop 4
; GFX942-SDAG-NEXT: global_store_dwordx4 v2, v[4:7], s[0:1] offset:-120 sc0
; GFX942-SDAG-NEXT: s_endpgm
;
; GFX1012-SDAG-LABEL: global_store_saddr_uniform_ptr_in_vgprs_immoffset:
; GFX1012-SDAG: ; %bb.0:
; GFX1012-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX1012-SDAG-NEXT: s_clause 0x1
; GFX1012-SDAG-NEXT: s_load_dword s6, s[4:5], 0x24
; GFX1012-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34
; GFX1012-SDAG-NEXT: ds_read_b64 v[4:5], v0
; GFX1012-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX1012-SDAG-NEXT: v_mov_b32_e32 v6, s6
; GFX1012-SDAG-NEXT: v_mov_b32_e32 v0, s0
; GFX1012-SDAG-NEXT: v_mov_b32_e32 v1, s1
; GFX1012-SDAG-NEXT: v_mov_b32_e32 v2, s2
; GFX1012-SDAG-NEXT: v_mov_b32_e32 v3, s3
; GFX1012-SDAG-NEXT: v_readfirstlane_b32 s0, v4
; GFX1012-SDAG-NEXT: v_readfirstlane_b32 s1, v5
; GFX1012-SDAG-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1] offset:-120
; GFX1012-SDAG-NEXT: s_endpgm
;
; GFX1100-SDAG-LABEL: global_store_saddr_uniform_ptr_in_vgprs_immoffset:
; GFX1100-SDAG: ; %bb.0:
; GFX1100-SDAG-NEXT: s_clause 0x1
; GFX1100-SDAG-NEXT: s_load_b32 s6, s[4:5], 0x24
; GFX1100-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x34
; GFX1100-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX1100-SDAG-NEXT: ds_load_b64 v[4:5], v0
; GFX1100-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX1100-SDAG-NEXT: v_mov_b32_e32 v6, s6
; GFX1100-SDAG-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX1100-SDAG-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX1100-SDAG-NEXT: v_readfirstlane_b32 s0, v4
; GFX1100-SDAG-NEXT: v_readfirstlane_b32 s1, v5
; GFX1100-SDAG-NEXT: global_store_b128 v6, v[0:3], s[0:1] offset:-120
; GFX1100-SDAG-NEXT: s_endpgm
;
; GFX1250-SDAG-LABEL: global_store_saddr_uniform_ptr_in_vgprs_immoffset:
; GFX1250-SDAG: ; %bb.0:
; GFX1250-SDAG-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
; GFX1250-SDAG-NEXT: v_nop
; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-SDAG-NEXT: s_clause 0x1
; GFX1250-SDAG-NEXT: s_load_b32 s6, s[4:5], 0x24 nv
; GFX1250-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x34 nv
; GFX1250-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX1250-SDAG-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v6, s6
; GFX1250-SDAG-NEXT: ds_load_b64 v[4:5], v0
; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX1250-SDAG-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GFX1250-SDAG-NEXT: s_wait_dscnt 0x0
; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s0, v4
; GFX1250-SDAG-NEXT: v_readfirstlane_b32 s1, v5
; GFX1250-SDAG-NEXT: global_store_b128 v6, v[0:3], s[0:1] offset:-120
; GFX1250-SDAG-NEXT: s_endpgm
;
; GFX906-ISEL-LABEL: global_store_saddr_uniform_ptr_in_vgprs_immoffset:
; GFX906-ISEL: ; %bb.0:
; GFX906-ISEL-NEXT: s_load_dword s6, s[4:5], 0x24
; GFX906-ISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34
; GFX906-ISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX906-ISEL-NEXT: ds_read_b64 v[0:1], v0
; GFX906-ISEL-NEXT: s_mov_b32 s7, 0
; GFX906-ISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX906-ISEL-NEXT: v_mov_b32_e32 v2, s6
; GFX906-ISEL-NEXT: v_mov_b32_e32 v3, s7
; GFX906-ISEL-NEXT: v_add_co_u32_e32 v4, vcc, v0, v2
; GFX906-ISEL-NEXT: v_addc_co_u32_e32 v5, vcc, v1, v3, vcc
; GFX906-ISEL-NEXT: v_mov_b32_e32 v0, s0
; GFX906-ISEL-NEXT: v_mov_b32_e32 v1, s1
; GFX906-ISEL-NEXT: v_mov_b32_e32 v2, s2
; GFX906-ISEL-NEXT: v_mov_b32_e32 v3, s3
; GFX906-ISEL-NEXT: global_store_dwordx4 v[4:5], v[0:3], off offset:-120
; GFX906-ISEL-NEXT: s_endpgm
;
; GFX942-ISEL-LABEL: global_store_saddr_uniform_ptr_in_vgprs_immoffset:
; GFX942-ISEL: ; %bb.0:
; GFX942-ISEL-NEXT: s_load_dword s6, s[4:5], 0x24
; GFX942-ISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34
; GFX942-ISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX942-ISEL-NEXT: ds_read_b64 v[0:1], v0
; GFX942-ISEL-NEXT: s_mov_b32 s7, 0
; GFX942-ISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX942-ISEL-NEXT: v_mov_b64_e32 v[2:3], s[6:7]
; GFX942-ISEL-NEXT: v_add_co_u32_e32 v4, vcc, v0, v2
; GFX942-ISEL-NEXT: s_nop 1
; GFX942-ISEL-NEXT: v_addc_co_u32_e32 v5, vcc, v1, v3, vcc
; GFX942-ISEL-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX942-ISEL-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GFX942-ISEL-NEXT: global_store_dwordx4 v[4:5], v[0:3], off offset:-120 sc0
; GFX942-ISEL-NEXT: s_endpgm
;
; GFX1012-ISEL-LABEL: global_store_saddr_uniform_ptr_in_vgprs_immoffset:
; GFX1012-ISEL: ; %bb.0:
; GFX1012-ISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX1012-ISEL-NEXT: s_clause 0x1
; GFX1012-ISEL-NEXT: s_load_dword s6, s[4:5], 0x24
; GFX1012-ISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34
; GFX1012-ISEL-NEXT: s_mov_b32 s7, 0
; GFX1012-ISEL-NEXT: ds_read_b64 v[0:1], v0
; GFX1012-ISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX1012-ISEL-NEXT: v_mov_b32_e32 v2, s6
; GFX1012-ISEL-NEXT: v_mov_b32_e32 v3, s7
; GFX1012-ISEL-NEXT: v_add_co_u32 v4, vcc_lo, v0, v2
; GFX1012-ISEL-NEXT: v_add_co_ci_u32_e32 v5, vcc_lo, v1, v3, vcc_lo
; GFX1012-ISEL-NEXT: v_mov_b32_e32 v0, s0
; GFX1012-ISEL-NEXT: v_mov_b32_e32 v1, s1
; GFX1012-ISEL-NEXT: v_mov_b32_e32 v2, s2
; GFX1012-ISEL-NEXT: v_mov_b32_e32 v3, s3
; GFX1012-ISEL-NEXT: global_store_dwordx4 v[4:5], v[0:3], off offset:-120
; GFX1012-ISEL-NEXT: s_endpgm
;
; GFX1100-ISEL-LABEL: global_store_saddr_uniform_ptr_in_vgprs_immoffset:
; GFX1100-ISEL: ; %bb.0:
; GFX1100-ISEL-NEXT: s_clause 0x1
; GFX1100-ISEL-NEXT: s_load_b32 s6, s[4:5], 0x24
; GFX1100-ISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x34
; GFX1100-ISEL-NEXT: s_mov_b32 s7, 0
; GFX1100-ISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX1100-ISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX1100-ISEL-NEXT: v_dual_mov_b32 v2, s6 :: v_dual_mov_b32 v3, s7
; GFX1100-ISEL-NEXT: ds_load_b64 v[0:1], v0
; GFX1100-ISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX1100-ISEL-NEXT: v_add_co_u32 v4, vcc_lo, v0, v2
; GFX1100-ISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-ISEL-NEXT: v_add_co_ci_u32_e64 v5, null, v1, v3, vcc_lo
; GFX1100-ISEL-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v3, s3
; GFX1100-ISEL-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v2, s2
; GFX1100-ISEL-NEXT: global_store_b128 v[4:5], v[0:3], off offset:-120
; GFX1100-ISEL-NEXT: s_endpgm
;
; GFX1250-ISEL-LABEL: global_store_saddr_uniform_ptr_in_vgprs_immoffset:
; GFX1250-ISEL: ; %bb.0:
; GFX1250-ISEL-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
; GFX1250-ISEL-NEXT: v_nop
; GFX1250-ISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-ISEL-NEXT: s_clause 0x1
; GFX1250-ISEL-NEXT: s_load_b32 s6, s[4:5], 0x24 nv
; GFX1250-ISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x34 nv
; GFX1250-ISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX1250-ISEL-NEXT: s_mov_b32 s7, 0
; GFX1250-ISEL-NEXT: ds_load_b64 v[0:1], v0
; GFX1250-ISEL-NEXT: s_wait_kmcnt 0x0
; GFX1250-ISEL-NEXT: v_mov_b64_e32 v[2:3], s[6:7]
; GFX1250-ISEL-NEXT: s_wait_dscnt 0x0
; GFX1250-ISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1250-ISEL-NEXT: v_add_co_u32 v4, vcc_lo, v0, v2
; GFX1250-ISEL-NEXT: v_add_co_ci_u32_e64 v5, null, v1, v3, vcc_lo
; GFX1250-ISEL-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GFX1250-ISEL-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GFX1250-ISEL-NEXT: global_store_b128 v[4:5], v[0:3], off offset:-120
; GFX1250-ISEL-NEXT: s_endpgm
%sbase = load ptr addrspace(1), ptr addrspace(3) @ptr.in.lds
%zext.offset = zext i32 %voffset to i64
%gep0 = getelementptr inbounds i8, ptr addrspace(1) %sbase, i64 %zext.offset
%gep1 = getelementptr inbounds i8, ptr addrspace(1) %gep0, i64 -120
call void @llvm.amdgcn.av.store.b128.p1(ptr addrspace(1) %gep1, <4 x i32> %data, metadata !1)
ret void
}
!0 = !{!"wavefront"}
!1 = !{!"workgroup"}
!2 = !{!"agent"}
!3 = !{!""}