derek.holloway
7502bf64a4
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37 lines
1.3 KiB
LLVM
37 lines
1.3 KiB
LLVM
; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri < %s | FileCheck -check-prefix=GCN %s
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; RUN: not llc -mtriple=amdgcn-unknown-unknown -mcpu=kaveri < %s 2>&1 | FileCheck -check-prefix=ERROR %s
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; ERROR: in function test{{.*}}: unsupported hsa intrinsic without hsa target
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; GCN-LABEL: {{^}}test:
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; GCN: s_load_dword s{{[0-9]+}}, s[4:5], 0x0
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; GCN: .amdhsa_user_sgpr_dispatch_ptr 1
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define amdgpu_kernel void @test(ptr addrspace(1) %out) {
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%dispatch_ptr = call noalias ptr addrspace(4) @llvm.amdgcn.dispatch.ptr() #0
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%value = load i32, ptr addrspace(4) %dispatch_ptr
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store i32 %value, ptr addrspace(1) %out
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ret void
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}
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; GCN-LABEL: {{^}}test2
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; GCN: s_load_dword s[[REG:[0-9]+]], s[4:5], 0x1
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; GCN: s_lshr_b32 s{{[0-9]+}}, s[[REG]], 16
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; GCN-NOT: load_ushort
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; GCN: s_endpgm
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; GCN: .amdhsa_user_sgpr_dispatch_ptr 1
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define amdgpu_kernel void @test2(ptr addrspace(1) %out) {
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%dispatch_ptr = call noalias ptr addrspace(4) @llvm.amdgcn.dispatch.ptr() #0
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%d1 = getelementptr inbounds i8, ptr addrspace(4) %dispatch_ptr, i64 6
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%v1 = load i16, ptr addrspace(4) %d1
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%e1 = zext i16 %v1 to i32
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store i32 %e1, ptr addrspace(1) %out
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ret void
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}
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declare noalias ptr addrspace(4) @llvm.amdgcn.dispatch.ptr() #0
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attributes #0 = { readnone }
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!llvm.module.flags = !{!0}
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!0 = !{i32 1, !"amdhsa_code_object_version", i32 400}
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